Method for variable length decoding using multiple configurable look-up tables
AssigneeApple Inc.
InventorsSushma Shrikant Trivedi, Jack Benkual, Joseph P. Bratt, William C. Athas
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Abstract
Methods and apparatuses for variable length decoding using multiple look-up tables simultaneously. In one aspect of the invention, a method for execution by a microprocessor in response to receiving a single instruction includes: receiving a string of bits; generating a plurality of indices using a plurality of segments of bits in the string of bits; looking up simultaneously a plurality of entries from a plurality of look-up tables using the plurality of indices; and combining the plurality of entries into a first result. The above operations are performed in response to the microprocessor receiving the single instruction.
Claims67
A method for execution by a microprocessor in response to receiving a single instruction, the method comprising:
- receiving a string of bits having a first plurality of segments;
- receiving a plurality of data elements including a control information specifying a location and a length of a second plurality of segments in the string of bits;
- generating a plurality of indices for one or more look-up tables that includes selecting the second plurality of segments from the first plurality of segments based on the control information;
- receiving a configuration indicator, wherein the configuration indicator indicates how to configure a plurality of look-up units into one or more look-up tables for execution of the single instruction;
- configuring the plurality of look-up units into the one or more look-up tables according to the configuration indicator;
- looking up simultaneously a plurality of entries from the one or more look-up tables using the plurality of indices, the one or more look-up tables configured from the plurality of look-up units, wherein each of said plurality of look-up units is a memory unit that is separate and distinct from others of said plurality of look-up units and is individually accessible independent of operations of the other look-up units, wherein a number of bits in the indices for the entries into the one or more look-up tables varies based upon how the plurality of look-up units are configured into the one or more look-up tables;
- and
- combining the plurality of entries into a first result;
- wherein the above operations are performed in response to the microprocessor receiving the single instruction.
A computer readable media containing an executable computer program instruction which when executed by a digital processing system causes said system to perform a method comprising:
- receiving a string of bits having a first plurality of segments;
- receiving a plurality of data elements including a control information specifying a location and a length of a second plurality of segments in the string of bits;
- generating a plurality of indices for one or more look-up tables that includes selecting the second plurality of segments from the first plurality of segments based on the control information;
- receiving a configuration indicator, wherein the configuration indicator indicates how to configure a plurality of look-up units into one or more look-up tables for execution of the single instruction;
- configuring the plurality of look-up units into one or more look-up tables according to the configuration indicator;
- looking up simultaneously a plurality of entries from the one or more look-up tables using the plurality of indices, the one or more look-up tables configured from the plurality of look-up units, wherein each of said plurality of look-up units is a memory unit that is separate and distinct from others of said plurality of look-up units and is individually accessible independent of operations of the other look-up units, wherein a number of bits in the indices for the entries into the one or more look-up tables varies based upon how the plurality of look-up units are configured into the one or more look-up tables;
- and
- combining the plurality of entries into a first result;
- wherein the above operations are performed in response to the microprocessor receiving the single instruction.
Dependencies are inferred from the claim text.