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US 7,680,992 B1Granted
Read-modify-write memory with low latency for critical requests
AssigneeNVIDIA Corporation
InventorsJames M. Van Dyke, Brian D. Hutsell
Life of this patent
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Abstract
A memory interface permits a read-modify-write process to be implemented as an interruptible process. A pending read-modify-write is capable of being temporarily interrupted to service a higher priority memory request.
Claims20
A memory interface, comprising:
- an arbiter to arbitrate memory requests from a plurality of clients;
- and
- an interruptible read-modify-write (RMW) module to process RMW memory requests received from said arbiter such that a RMW operation initiated to fulfill a memory request that is in progress is capable of being temporarily interrupted to process another memory request, the memory interface for a temporarily interrupted RMW operation suspending the RMW operation and storing state information for the temporarily interrupted RMW operation to permit processing of the temporarily interrupted RMW operation to be resumed after processing said another memory request.
A method of interfacing clients to a memory, comprising:
- in response to detecting a first memory request from a first client that is a read-modify-write memory request, initiating an interruptible read-modify-write memory request process;
- in response to detecting a second memory request from a second client that is a high priority request interrupting said first memory request to service said second memory request, said interrupting including suspending said first memory request and storing state information for the first memory request to be resumed subsequent to processing said second memory request;
- and
- in response to completing said second memory request, resuming said first memory request.
1 more element
Dependencies are inferred from the claim text.