Page and block management algorithm for NAND flash

An flash memory system comprising:

• flash memory organized into a plurality of blocks of pages, for storage of information, a page including data and spare, each of the blocks, within the flash memory, being identifiable by a physical address;
• and
• a flash controller adapted to communicate with a host and the flash memory and including volatile memory configured to store a page-block table of logical addresses addressable by the physical addresses, the logical addresses used by the controller to identify the blocks, the table having an address mapping table and a property value table, the property value table including property values, each of the property values being increased in value every time a block is written, up to a maximum value, and being associated with a block of a predetermined group of blocks and indicative of the number of times a block has been written, the property values corresponding to the logical addresses of the address mapping table,
• wherein the maximum number the property values of the predetermined group of blocks take on is adjustably different than the maximum number the property values of another group of blocks.

A method of wear-leveling used in a flash memory system comprising:

• receiving information to be written into a block of flash memory, the flash memory organized into a plurality of blocks of pages, for storage of information, a page including data and spare, the blocks being identifiable, within the flash memory, by a physical address;
• determining whether the received block of information has been written thereto without having been erased since the last time it was written;
• and
• upon determining that the received block of information has not been written thereto since it was last thereto written, writing the received block of information into a first block within the flash memory, identified by a physical address;
• setting a property value associated with the received block to a first value indicative of a first time the received block has been written;
• upon determining that the received block of information has been previously written, writing the received block of information into a second block, within the flash memory, identified by a physical address;
• setting a property value associated with the received block to a second value indicative of a second time the received block has been written;
• as the received block of information continues to be re-written, writing the received block of information into different blocks, within the flash memory, identified by different physical addresses;
• and
• setting the property valued associated with the received block to a different value each time the received block is written.