System and method of generating equation-level diagnostic error messages for use in circuit simulation

A system for identifying equation-level errors in a system model used in a circuit simulation, comprising:

• a processor;
• a representation representing the structure of a system model to be simulated, the system including a plurality of system model components;
• a plurality of numerical equations, each numerical equation corresponding to a system model component or a topology equation for the system model;
• and
• an analysis facility, utilizing the processor, for identifying an illegal configuration in the system model, the analysis facility performing a numerical analysis of at least one of the numerical equations,
• wherein the identified illegal configuration is an illegal component equation for a component in the system model.

A medium holding computer-executable instructions for identifying equation-level errors in a system model used in a circuit simulation, the instructions comprising:

• instructions for providing a representation representing the structure of a system to be simulated, the system including a plurality of system model components;
• instructions for converting the representation representing the structure of the system to a plurality of numerical equations, each numerical equation corresponding to a system model component or a topology equation for the system model;
• and
• instructions for identifying an illegal configuration in the system model by performing a numerical analysis of at least one of the numerical equations,
• wherein the identified illegal configuration is an illegal component equation for a component in the system model.

A distributed system for identifying equation-level errors in a system model used in circuit simulation, comprising:

• a first computing device accessed by a user, the first computing device communicating over a network with a second computing device;
• the second computing device that supports a circuit simulation environment, the circuit simulation environment including a representation representing the structure of a system model to be simulated and an analysis facility, the representation including representations of a plurality of system model components that are converted into a plurality of numerical equations, each numerical equation corresponding to a representation of a system model component in the representation, the analysis facility identifying an illegal configuration in the system model by performing a numerical analysis of at least one of the numerical equations, wherein the identified illegal configuration is an illegal component equation for a component in the system model;
• and
• a display device in communication with the first computing device and viewable by the user, the display device displaying at least one of an error message generated in the circuit simulation environment that identifies at least one component involved in the illegal configuration or a graphical representation of the system model that includes at least one indicator associated with a system model component identified as involved in the identified illegal configuration.

A method for identifying equation-level errors in a system model used in circuit simulation, comprising:

• providing a representation of the structure of a system model to be simulated, the system model including a plurality of system model components;
• converting the representation of the structure of the system model to a plurality of numerical equations, each numerical equation corresponding to a system model component or a topology equation for the system model;
• identifying at least one illegal configuration in the system model by performing a symbolic analysis of at least one of the numerical equations, wherein the identified illegal configuration is an illegal component equation for a component in the system model;
• and
• generating an error message identifying at least one system model component involved in the illegal configuration.