Methods and systems for coding of a bang-bang detector
OwnerWilliam B. Wilson, Mark Traffordinventors
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Abstract
Various apparatus and methods for related to clock recovery are disclosed. For example, in one illustrative embodiment, a clock recovery circuit includes a coding circuit adapted to translate a stream of first digital numbers derived from a source signal into a stream of first binary numbers and a stream of second binary numbers, a digital-to-analog converter (DAC) circuit coupled to the coding circuit and configured to provide an analog output based on the streams of first and second binary numbers and a voltage-controlled oscillator (VCO) controlled by the analog output of the DAC circuit and adapted to produce a base clock having a base clock frequency.
Claims26
A clock recovery circuit, comprising:
- a coding circuit adapted to translate a stream of first digital numbers derived from a source signal into a stream of first binary numbers each ranging from 0 to N and a stream of second binary numbers each ranging from 0 to −N;
- a current control device coupled to the coding circuit and configured to provide an analog output based on the streams of first and second binary numbers;
- and
- a voltage-controlled oscillator (VCO) controlled by the analog output and adapted to produce a base clock having a base clock frequency.
A clock recovery circuit, comprising:
- a bank of multiple analog-to-digital converters (ADCs) with each ADC adapted to sample a common source signal using a respective output clock signal of a multi-phased clock device to produce a stream of digital output samples;
- an adding device adapted to add the last output sample of the stream of digital output samples of each of the ADCs;
- a coding means coupled to the adding device for converting first digital signals derived from the adding device into a stream of first binary numbers each ranging from 0 to N and a stream of second binary numbers each ranging from 0 to −N, wherein N is a positive integer;
- and
- a conversion means for providing an analog control signal to a voltage controlled oscillator based on the first and second streams of binary numbers.
A method for performing clock recovery for a source signal, comprising:
- digitally sampling the source signal to produce digital samples at a rate 4 times that of a base clock frequency and at a resolution of 1.5 bits to produce a stream of digital samples;
- digitally adding the last 4 digital samples of the stream of digital samples to produce a stream of digital sums;
- coding either the stream of digital sums or a stream of digital filtered sums derived from the stream of digital sums into two separate streams of binary numbers;
- converting the two separate streams of binary numbers into a single analog output using a positive current mirror and a negative current mirror;
- and
- providing the analog output to a voltage controlled oscillator.
A clock recovery circuit, wherein the clock recovery circuit comprises:
- a coding circuit adapted to translate a stream of first digital numbers derived from a source signal into a stream of binary numbers, and wherein the coding circuit includes a feedback signal adapted to cause the coding circuit to increment or decrement a subsequent output number in the stream of binary numbers;
- a current control device coupled to the coding circuit and configured to provide an analog output based on the streams of first and second binary numbers;
- and
- a voltage-controlled oscillator (VCO) controlled by the analog output and adapted to produce a base clock having a base clock frequency.
Dependencies are inferred from the claim text.