Systems including packet interfaces, switches, and packet DMA circuits for splitting and merging packet streams
AssigneeBroadcom Corporation
InventorsBarton Sano, Laurent R. Moll, Manu Gulati
Life of this patent
Estimating the term…
Abstract
An integrated circuit includes receive circuits for receiving packets, transmit circuits for transmitting packets, a packet DMA circuit for communicating packets to and from a memory controller, and a switch for selectively coupling the receive circuits to transmit circuits. The integrated circuit may flexibly merge and split the packet streams to provide for various packet processing/packet routing functions to be applied to different packets within the packet streams. An apparatus may include two or more of the integrated circuits, which may communicate packets between respective receive and transmit circuits.
Claims17
An apparatus comprising:
- a receive circuit coupled to receive packets on one of a plurality of input virtual channels and to use a hash and route circuit to separate the packets based on destinations for the packets, the hash and route circuit to select a different one of a plurality of switch virtual channels for each different destination of the packets and to send the packets to the destinations on the selected switch virtual channels based on the destinations;
- a transmit circuit to retransmit corresponding separated packets of the received packets, in which the transmit circuit is selected as a destination;
- a direct memory access (DMA) circuit to couple the corresponding separated packets of the received packets to a memory controller for coupling to a memory, in which the DMA circuit is selected as a destination;
- and
- a switch coupled to the receive circuit, the transmit circuit and the DMA circuit to switch corresponding separated packets on a switch virtual channel destined for the transmit circuit to the transmit circuit, switch corresponding separated packets on a switch virtual channel destined for the DMA circuit to the DMA circuit, and the switch to also merge other packets destined for the transmit circuit with the corresponding separated packets from the receiver which are destined for the transmit circuit;
- wherein the receive circuit, the transmit circuit, the DMA circuit and the switch are integrated onto an integrated circuit.
An integrated circuit comprising:
- a receive circuit coupled to receive packets on one of a plurality of input virtual channels and to use a hash and route circuit to separate the packets based on destinations for the packets, the hash and route circuit to select a different one of a plurality of switch virtual channels for each different destination of the packets and to send the packets to the destinations on the selected switch virtual channels based on the destinations;
- a transmit circuit to retransmit corresponding separated packets of the received packets, in which the transmit circuit is selected as a destination;
- a direct memory access (DMA) circuit to couple the corresponding separated packets of the received packets to a memory controller for coupling to a memory, in which the DMA circuit is selected as a destination;
- and
- a switch coupled to the receive circuit, the transmit circuit and the DMA circuit to switch corresponding separated packets on a switch virtual channel destined for the transmit circuit to the transmit circuit, switch corresponding separated packets on a switch virtual channel destined for the DMA circuit to the DMA circuit, and the switch to also merge other packets destined for the transmit circuit with the corresponding separated packets from the receiver which are destined for the transmit circuit.
A method comprising:
- receiving packets on one of a plurality of input virtual channels in an integrated circuit;
- selecting destinations from a plurality of destinations for the received packets;
- applying a hash and route operation to separate the packets based on destinations for the packets;
- selecting a different switch virtual channel from a plurality of switch virtual channels for transfer of corresponding separated packets based on the destinations;
- switching the corresponding separated packets on a switch virtual channel destined for a transmit circuit to the transmit circuit;
- switching the corresponding separated packets on a switch virtual channel destined for a DMA circuit to the DMA circuit;
- merging other packets destined for the transmit circuit with the corresponding separated packets from the receiver which are destined for the transmit circuit;
- and
- routing the corresponding separated packets to the destinations.
Dependencies are inferred from the claim text.