Configurable memory data path
AssigneeQimonda North Amercia Corp.
InventorRom-Shen Kao
Life of this patent
Estimating the term…
Abstract
A data path in a memory device is configured by selecting a data path configuration configured to at least partially maintain data bit order between the memory device and a chip carrier. The memory data path is arranged based on the data path configuration for memory operations where maintaining data bit order between the memory device and the chip carrier is required.
Claims27
A method of configuring a data path in a memory device, comprising:
- selecting one of a first data path configuration configured to at least partially maintain data bit order between the memory device and a chip carrier and a second different data path configuration;
- arranging the memory data path based on the first data path configuration for memory operations where maintaining data bit order between the memory device and the chip carrier is required;
- and
- arranging the memory data path based on the second data path configuration for memory operations where maintaining data bit order between the memory device and the chip carrier is not required.
A memory device, comprising circuitry configured to:
- select one of a first data path configuration configured to at least partially maintain data bit order between the memory device and a chip carrier and a second different data path configuration;
- arrange a data path in the memory device based on the first data path configuration for memory operations where maintaining data bit order between the memory device and the chip carrier is required;
- and
- arrange the data path in the memory device based on the second data path configuration for memory operations where maintaining data bit order between the memory device and the chip carrier is not required.
A memory device, comprising:
- means for selecting one of a first data path configuration configured to at least partially maintain data bit order between the memory device and a chip carrier and a second different data path configuration;
- and
- means for arranging a data path in the memory device based on the first data path configuration for memory operations where maintaining data bit order between the memory device and the chip carrier is required and arranging the data path in the memory device based on the second data path configuration for memory operations where maintaining data bit order between the memory device and the chip carrier is not required.
A method of configuring a data path in a dynamic random access memory (DRAM) device, comprising:
- arranging the DRAM data path based on a first data path configuration for memory operations where maintaining data bit order between the DRAM device and a chip carrier is required, the first data path configuration configured to at least partially maintain data bit order between the DRAM device and the chip carrier;
- and
- arranging the DRAM data path based on a different data path configuration for memory operations where maintaining data bit order between the DRAM device and the chip carrier is not required.
A dynamic random access memory (DRAM) device, comprising circuitry configured to:
- arrange a data path in the DRAM device based on a first data path configuration for memory operations where maintaining data bit order between the DRAM device and a chip carrier is required, the first data path configuration configured to at least partially maintain data bit order between the DRAM device and the chip carrier;
- and
- arrange the DRAM data path based on a different data path configuration for memory operations where maintaining data bit order between the DRAM device and the chip carrier is not required.
Dependencies are inferred from the claim text.