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US 7,679,975 B2Granted
Semiconductor memory devices having redundancy arrays
AssigneeSamsung Electronics Co., Ltd.
InventorKye-hyun Kyung
Life of this patent
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Abstract
A semiconductor memory device includes a plurality of memory areas. Each of the memory areas includes a normal cell array and a redundancy cell array for repairing defective cells generated in the normal cell array such that the semiconductor memory device is usable even when memory arrays include defective cells. A size of a redundancy cell array of a first memory area is greater than a size of the redundancy cell arrays of the other memory areas.
Claims15
A semiconductor memory device including a plurality of memory areas, each of the memory areas comprising:
- a first cell array;
- a redundancy cell array for repairing defective cells generated in the first cell array;
- and
- an address indicating unit indicating an address of the corresponding memory area, each address indicating unit using a same address to indicate the first cell array and the redundancy cell array included in the corresponding memory area,
- wherein each of the plurality of memory areas are configured so that the address of the first cell array and the redundancy cell array of one of the plurality of memory areas is replaceable with the address of the first cell array and the redundancy cell array of a different one of the plurality memory areas,
- and a first cell array of at least one of the memory areas is a system memory array for operating system software.
3 more elements
Dependencies are inferred from the claim text.