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US 7,679,974 B2Granted
Memory device having selectively decoupleable memory portions and method thereof
AssigneeFreescale Semiconductor, Inc.
InventorRyan R. Ross
Life of this patent
Estimating the term…
Abstract
In response to determining a bit cell of a bit cell array of a memory device is a defective bit cell, a portion of the bit cell array including the defective bit cell is decoupled from a power source of the memory device. The portion can be decoupled via a fuse, a transistor, and the like.
Claims11
A method comprising:
- determining whether a select bit cell of a bit cell array of a memory device is a defective bit cell;
- and
- electrically decoupling the select bit cell from a power source of the memory device by disrupting a conductivity of a fuse coupling a power input of a select portion of the bit cell array to the power source in response to determining the select bit cell is a defective bit cell, the select portion comprising the select bit cell.
A memory device comprising:
- a bit cell array comprising a plurality of bit cells;
- a fuse comprising an input coupled to a power source and an output coupled to a power input of a select portion of the bit cell array, the fuse configurable to decouple the power input of the select portion from the power source in response to the select portion comprising a defective bit cell.
Dependencies are inferred from the claim text.