Semiconductor devices with source and bulk coupled to separate voltage supplies
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJhon-Jhy Liaw
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Abstract
A semiconductor transistor array is disclosed having a plurality of identical transistors, with sources of the transistors commonly coupled to a first voltage supply, and bulks of the transistors commonly coupled to a second voltage supply which is different from the first voltage supply, wherein different voltages can be supplied to the sources and bulks.
Claims18
A semiconductor transistor array having a plurality of identical transistors in a first column, the transistor array comprising:
- a first transistor in the first column having a first source and a first bulk;
- a second transistor in the first column having a second source and a second bulk;
- and
- a third transistor in a second column having a third source and a third bulk, wherein the third source is coupled to a third voltage supply line that is different from the first or second voltage supply lines, and the third bulk is coupled to the second voltage supply line,
- wherein the first and second sources are commonly coupled to a first voltage supply line, and the first and second bulks are commonly coupled to a second voltage supply line that is different from the first voltage supply line, and
- wherein the first, second and third voltage supply lines are coupled to different voltage suppliers.
A semiconductor cell array having a plurality of identical cells, the cell away comprising:
- a first cell having a first transistor with a first source and a first bulk;
- and
- a second cell having a second transistor with a second source and a second bulk,
- wherein the first source is coupled to a first voltage supply line, the second source is coupled to a second voltage supply line which is different from and substantially parallel to the first voltage supply line, and the first and second bulks are commonly coupled to a third voltage supply line that is different from the first and second voltage supply lines, and
- wherein different voltages are applied to the first and second voltage supply lines during different operations of the cell array.
An array of static random access memory (SRAM) cells, comprising:
- a first continuous Nwell column serving as bulks of a plurality of pull-up transistors in a first column of the away of SRAM cells;
- a first voltage supply line coupled to one or more sources of the plurality of pull-up transistors;
- and
- a second voltage supply line coupled to the first continuous Nwell column,
- wherein the first and second voltage supply lines are separate, and
- wherein the first voltage supply line is substantially parallel to the continuous Nwell column.
Dependencies are inferred from the claim text.