Liquid crystal display device and manufacturing method thereof

A liquid crystal display device, comprising:

• an upper substrate;
• a lower substrate facing the upper substrate;
• a liquid crystal layer formed between the upper substrate and the lower substrate;
• common electrodes and pixel electrodes formed parallel to each other in pixel regions of the lower substrate;
• a plurality of first polymer walls formed between the upper substrate and the lower substrate;
• and
• a plurality of second polymer walls formed parallel to the first polymer walls in the pixel region between the upper substrate and the lower substrate, wherein the first and the second polymer walls have different dielectric constant.

A manufacturing method of a liquid crystal display, comprising:

• forming gate lines and data lines on a lower substrate, the gate and data lines intersecting each other to define a plurality of pixel regions;
• forming a plurality of thin film transistors at respective intersections of the gate and data lines;
• forming common electrodes and pixel electrodes in parallel with each other in the pixel regions;
• joining an upper substrate with the lower substrate so that a liquid crystal layer is disposed between the upper substrate and the lower substrate;
• and
• forming a plurality of polymer walls between the upper substrate and the lower substrate,
• wherein an initial alignment and a liquid crystal director of the liquid crystal layer are controlled by the polymer walls without orientation films.

A manufacturing method of a liquid crystal display, comprising:

• forming gate lines and data lines on a lower substrate, the gate and data lines intersecting each other to define a plurality of pixel regions;
• forming a plurality of thin film transistors at respective intersections of the gate and data lines;
• forming common electrodes and pixel electrodes in parallel with each other in the pixel regions;
• joining an upper substrate with the lower substrate so that a liquid crystal layer is disposed between the upper substrate and the lower substrate;
• and
• forming a plurality of first polymer walls along the gate lines between the upper substrate and the lower substrate and a plurality of second polymer walls parallel to the gate lines in the pixel regions between the upper and lower substrates, wherein the first and second polymer walls have different dielectric constant.