High-rate RLL encoding

The method of clam 2, further comprising:

• receiving an encoded input sequence of a rate-(m)/(m+1) PRML code;
• separating the received encoded input sequence into a first received encoded rate-16/17 PRML (G=6, I=7, M=15) sequence and a second received sequence of m−16 bits;
• decoding the first received encoded sequence into a 16-bit decoded sequence;
• and
• multiplexing the 16-bit decoded sequence with the second received sequence to generate the decoded m-bit sequence which is equal to the original unencoded m-bit sequence if the received bits are not in error.

A system for encoding a data input sequence of m bits into an output sequence codeword of m+1 bits, where m is an integer multiple of 16, comprising:

• a demultiplexor operable to receive an unencoded m-bit input sequence and separate the m-bit input sequence into a first unencoded set of 16 bits and a second unencoded set of m−16 bits;
• a plurality K of encoding stages operable to encode the first unencoded set into a rate-16/17 PRML (G=6, I=7, M=15) encoded sequence;
• and
• a multiplexor operable to multiplex the 16/17 encoded sequence with the second unencoded set to generate an encoded sequence of a rate-(m)/(m+1) PRML code.

An encoder for encoding a data input sequence of m bits into an output sequence codeword of m+1 bits, where m is an integer multiple of an ECC symbol size s, comprising:

• a demultiplexor operable to receive a data stream of unencoded m-bit input sequences and divide each m-bit input sequence into a first block of n bits and a second block of m-n unencoded bits, where n is an integer multiple of s;
• a plurality of encoder stages operable to:
• encode the first block of n bits into a first set of n+1 encoded bits, wherein at least one of P1 subblocks of the first set of n+bits satisfies a G constraint, an M constraint and an I constraint;
• map in a one-to-one manner the first set of n+1 encoded bits into a second set of n+1 encoded bits wherein, at least one of P2 subblocks of the second set of n+1 bits gives rise to at least Q1 transitions after 1/(1+D2) precoding;
• and
• divide the second set of n+1 encoded bits into P3 encoded subblocks;
• and
• a multiplexor operable to interleave the P3 encoded subblocks among (m−n)/s unencoded symbols so as to form the (m+1)-bit output sequence codeword to be stored on a data storage medium.