Continuous wave based bias method and apparatus for minimizing MOS transistor distortion

A method of setting a bias voltage in a transistor circuit, the method comprising steps of:

• in a replica transistor circuit of the transistor circuit,
• applying a continuous wave (CW) signal at an input of the replica transistor circuit to obtain an output signal at an output of the replica transistor circuit, the CW signal having a frequency fo;
• determining, at the output of the replica transistor circuit, a value of an Nth-order distortion component of the output signal, the Nth-order distortion component being at a frequency equal to N*fo, N being an integer greater than one;
• and
• in the transistor circuit, applying a bias voltage at an input of the transistor circuit in accordance with the value of the Nth-order distortion component.

A method for varying distortion in a transistor, the method comprising steps of:

• applying a continuous wave (CW) signal at an input of the transistor to obtain an output signal at an output of the transistor, the CW signal having a frequency fo;
• determining, at the output of the transistor, a value of an Nth-order distortion component of the output signal, the Nth-order distortion component being at a frequency equal to N*fo, N being an integer greater than one;
• and
• applying a bias voltage at the input of the transistor in accordance with the value of the Nth-order distortion component.