Raised solder-mask-defined (SMD) solder ball pads for a laminate electronic circuit board
AssigneeTexas Instruments Incorporated
InventorsTz-Cheng Chiu, Manjula N Variyam
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AssigneeTexas Instruments Incorporated
InventorsTz-Cheng Chiu, Manjula N Variyam
Estimating the term…
A raised solder-mask-defined (SMD) pad configured for receiving a solder ball on a laminate electronic circuit board and a method of creating the raised SMD pad on a laminate electronic circuit board. The method may comprise forming a base bump, covering the base bump with a conductive bump layer and layering a surrounding material over an extended edge of the conductive bump layer. The surrounding material is patterned to expose a pad face and of a portion of the sides of the conductive bump layer, such that the pad face is disposed above the surface of the surrounding material. The surrounding material may be patterned by a photolithography operation or alternatively, a laser-drill operation.
A raised solder-mask-defined (SMD) solder ball pad comprising:
Dependencies are inferred from the claim text.
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Forming printed elements for providing electric connections to or between printed circuits: surface contacts, e.g. bumps
Printed elements for providing electric connections to or between printed circuits: pads for surface mounting, e.g. lay-out
By soldering: solder masks
By soldering: application of solder
Term ended 31 Mar 2024 (estimated)
Integrated circuits are fabricated on the surface of a semiconductor wafer in layers and later singulated into individual dies. Since the material of a semiconductor wafer—commonly silicon—tends to be relatively fragile and brittle, dies are often assembled into a protective housing, or package, before they are interconnected with a printed circuit board (PCB). Referring now to FIG. 1, a cross-sectional view is shown of a packaged semiconductor device 100. A semiconductor die 110 is shown attached to a package substrate 120, a structure comprising alternating layers of conductive material 122 and insulating material 124. The die 110 is electrically interconnected to the package substrate 120 by a plurality of bond wires 130. The top surface 126 and bottom surface 128 of the package substrate 120 may be covered with a photo-definable solder mask material 132, in which openings can be created, exposing a portion of the metal 122 below.
The die 110 and bond wires 130 may be encapsulated by a solid mold compound 140 (e.g., an epoxy), protecting the bond wires from physical damage and/or environmental effects. Solder balls 150, spheres of conductive material (e.g., tin-lead), may be attached to solder ball pads 170. Solder ball pads 170 are typically circular areas of conductive material 122 exposed by openings in the solder mask layer 132 on the bottom surface 128 of the substrate 120. When mounted to a PCB 180, the conductive material 122 forms a pathway of electrical communication between the die 110 and the PCB, as well as to the electrical device (not shown) in which the PCB is eventually installed. The package substrate 120 and PCB 180 may both be laminate electronic circuit boards with similar constructions, which will be discussed in more detail herein.
Referring now to FIG. 2A, a cross-sectional view of a solder joint 200 is shown, in which a solder ball 150 is mounted between a standard solder-mask-defined (SMD) solder ball pad 170 and a PCB 180. The standard SMD pad 170 is so named because the pad 170 is “defined” by the solder mask 132, such that only the central portion of the pad is exposed for attachment to a solder ball 150. FIG. 2B shows a perspective view of the standard SMD pad 170. The opening 210 in the solder mask 132 defines the pad area exposed for attachment to a solder ball (not shown in FIG. 2B). The insulating material 124 used in a package substrate 120 may be bismaleimide triazine (BT), with a center insulating layer, or core, of BT or another organic material, such as glass-fiber-reinforced epoxy (FR4). The conductive material 122 may be copper, which may tend to delaminate, or peel away, from the BT when subjected to temperature cycling used in semiconductor package reliability testing. Adhesion between the insulating material 124 and the solder mask 132, another non-metal, may be greater than adhesion between an organic insulating material and a metal pad 170. As such, the overhanging lip 212 of solder mask 132 covering the outer edge 172 of pad 170 may serve to hold the pad onto the insulating material 124, lessening the chance for delamination.
For a detailed description of the preferred embodiments of the invention, reference will now be made to the accompanying drawings in which:
FIG. 1 is a cross-sectional view of a packaged semiconductor die;
FIG. 2A is a cross-sectional view of a solder joint in which a solder ball is mounted between a solder-mask-defined (SMD) solder ball pad and a printed circuit board (PCB);
Certain terms are used throughout the following description and claims to refer to particular system components. As one skilled in the art will appreciate, companies may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following discussion and in the claims, the terms “including” and “comprising” are used in an open-ended fashion, and thus should be interpreted to mean “including, but not limited to . . . ”. Also, the term “couple” or “couples” is intended to mean either an indirect or direct connection. Thus, if a first device couples to a second device, that connection may be through a direct connection, or through an indirect electrical connection via other devices and connections.
The term “integrated circuit” refers to a set of electronic components and their interconnections (internal electrical circuit elements, collectively) that are patterned on the surface of a silicon, or other suitable, semiconductor substrate. The term “packaged semiconductor device” refers generically to an integrated circuit (IC) assembled into a semiconductor package. The term “die” (“dies” for plural) refers generically to an integrated circuit, in various stages of completion, including the underlying semiconductor substrate and all circuitry patterned thereon. The term “wafer” refers to a generally round, single-crystal semiconductor substrate.
The term “interconnect” refers to a physical connection providing electrical communication between the connected items. The term “packaged semiconductor device” refers to a die mounted within a package, as well as all package constituent components. The term “semiconductor package” refers generically to the components for encapsulating and interconnecting a die to a printed circuit board. To the extent that any term is not specially defined in this specification, the intent is that the term is to be given its plain and ordinary meaning.