Localized temperature control during rapid thermal anneal
AssigneeInternational Business Machines Corporation
InventorsBrent A. Anderson, Edward J. Nowak
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AssigneeInternational Business Machines Corporation
InventorsBrent A. Anderson, Edward J. Nowak
Estimating the term…
Disclosed herein are embodiments of a semiconductor structure and an associated method of forming the semiconductor structure with shallow trench isolation structures having selectively adjusted reflectance and absorption characteristics in order to ensure uniform temperature changes across a wafer during a rapid thermal anneal and, thereby, limit variations in device performance. Also disclosed are embodiments of another semiconductor structure and an associated method of forming the semiconductor structure with devices having selectively adjusted reflectance and absorption characteristics in order to either selectively vary the performance of individual devices (e.g., to form devices with different threshold voltages (Vt) on the same wafer) and/or to selectively optimize the anneal temperature of individual devices (e.g., to ensure optimal activation temperatures for n-type and p-type dopants during anneals).
A semiconductor structure comprising:
A semiconductor structure comprising:
A semiconductor structure comprising:
Dependencies are inferred from the claim text.