Semiconductor device and method for manufacturing the same

A semiconductor device comprising:

• a semiconductor substrate having an active region;
• a gate electrode formed on the active region with a gate insulating film interposed therebetween;
• and
• a source/drain region which is formed in the active region on both sides of the gate electrode, and which constitutes a MOS transistor of a memory cell with the gate electrode,
• wherein the gate electrode is sifted to a region that functions as a source of the source/drain region, whereby a length in a gate length direction of the region is made shorter than a length in a gate length direction of a region functioning as a drain of the source/drain region.

A method for manufacturing a semiconductor device comprising the steps of:

• forming a device isolation insulating film on a semiconductor substrate and dividing an active region of the semiconductor substrate into plural pieces by the device isolation insulating film;
• forming a channel region by implanting first impurities into the semiconductor substrate of the active region;
• forming a gate electrode on the semiconductor substrate of the active region with a gate insulating film interposed therebetween;
• forming a source/drain region by implanting second impurities into the silicon substrate on both sides of the gate electrode and thereby forming a MOS transistor of a memory cell constructed from the source/drain region and the gate electrode;
• forming an interlayer insulating film over the device isolation insulating film and the source/drain region;
• forming a hole in the interlayer insulating film, the hole commonly overlapping with the two adjacent active regions and the device isolation insulating film between the two active regions;
• and
• forming a conductive plug in the hole, the conductive plug electrically connecting the two active regions.

A semiconductor device comprising:

• a semiconductor substrate;
• a device isolation insulating film dividing an active region of the semiconductor substrate into plural pieces;
• a gate electrode formed on the active region with a gate insulating film interposed therebetween;
• a source/drain region which is formed in the active region on both sides of the gate electrode, and which constitutes a MOS transistor of a memory cell with the gate electrode;
• an interlayer insulating film formed over each of the active region and the device isolation insulating film;
• a hole which is formed in the interlayer insulating film, and which commonly overlaps with two adjacent active regions and the device isolation insulting film between the two active regions;
• and
• a conductive plug which is formed in the hole, and which electrically connects the two active regions,
• wherein a plurality of the MOS transistors are formed,
• at least two of the plural MOS transistors are transfer transistors, and
• the active regions of the adjacent two transfer transistors are electrically connected with each other by the conductive plug.