Semiconductor device having MOS transistor and protection diode and method for designing the same

A method for designing a semiconductor device, wherein the semiconductor device includes

• a MOS transistor having a drain and a source;
• a protection diode having a cathode and an anode;
• and a semiconductor substrate having an N− conductive type, wherein
• the MOS transistor and the protection diode are disposed in the semiconductor substrate, wherein
• the drain of the MOS transistor is connected to the cathode of the protection diode, and wherein
• the source of the MOS transistor is connected to the anode of the protection diode,
• the anode of the protection diode is provided by a P type region disposed in a surface portion of the semiconductor substrate having a N− conductive type,
• the cathode of the protection diode is provided by a N− type region disposed in the surface portion of the semiconductor substrate having a N− conductive type,
• the N type region is disposed adjacent to the P type region,
• the surface portion of the semiconductor substrate having a N− conductive type further includes a P+ type region and a first N+ type region,
• the P+ type region is disposed in the P type region in order to connect to an electrode of the anode,
• the first N+ type region is disposed in the N type region in order to connect to an electrode of the cathode,
• the semiconductor substrate having an N− conductive type has an SOI construction so that the semiconductor substrate includes an embedded insulation film and an N− type SOI layer,
• the N− type SOI layer is disposed on the embedded insulation film,
• the semiconductor substrate further includes a N+ type layer, which is disposed between the N− type SOI layer and the embedded insulation film,
• the surface portion of the semiconductor substrate having an N− conductive type further includes a second N type region,
• the second N type region is disposed adjacent to the N type region, and
• the P type region is disposed in the second N type region, the method comprising the step of:
• setting a withstand voltage of the MOS transistor and a withstand voltage of the protection diode, a parasitic resistance and a maximum current of the protection diode to satisfy a relationship of VT>VD+IRmax×RD, wherein
• the withstand voltage of the MOS transistor is defined as VT, and
• the withstand voltage of the protection diode is defined as VD, the parasitic resistance of the protection diode is defined as RD, and the maximum current of the protection diode is defined as IRmax wherein the maximum current of IRmax of the protection diode is equal to or larger than 45 Amperes.