FinFET device with gate electrode and spacers
AssigneeInfineon Technologies AG
InventorThomas Schulz
Life of this patent
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Abstract
A semiconductor device includes a source region, a drain region, and a fin that connects the source region to the drain region. A gate electrode having a substantially planar surface overlies the fin and is positioned between the drain region and the source region. A first set of spacers is positioned between a first sidewall of the gate electrode and the source region and between a second sidewall of the gate electrode and the drain region. A second set of spacers is positioned on at least a portion of a top surface of the source region and the drain region and alongside at least a portion of the first set of spacers. At least a portion of sidewalls of the second set of spacers contacts a portion of the first or second sidewall of the gate electrode.
Claims20
A semiconductor device comprising:
- a source region, a drain region, and a fin that connects the source region to the drain region;
- a gate electrode having a substantially planar surface overlying the fin and positioned between the drain region and the source region;
- a first set of spacers positioned between a first sidewall of the gate electrode and the source region and between a second sidewall of the gate electrode and the drain region, the first set of spacers comprising a first surface, a second surface opposite the first surface, and a top surface connecting the first surface and the second surface, wherein the top surface is covered by the gate electrode;
- and
- a second set of spacers positioned on at least a portion of a top surface of the source region and the drain region and alongside at least a portion of the first set of spacers, wherein at least a portion of sidewalls of the second set of spacers contacts a portion of the first or second sidewall of the gate electrode.
A semiconductor device comprising:
- a source region, a drain region, and a plurality of fins that connect the source region to the drain region;
- a gate electrode having a substantially planar surface overlying the fins and positioned between the drain region and the source region;
- a first set of spacers positioned between a first sidewall of the gate electrode and the source region and between a second sidewall of the gate electrode and the drain region, the first set of spacers comprising a first surface, a second surface opposite the first surface, and a top surface connecting the first surface and the second surface, wherein the top surface is covered by the gate electrode;
- and
- a second set of spacers positioned on at least a portion of a top surface of the source region and the drain region and alongside at least a portion of the first set of spacers, wherein at least a portion of sidewalls of the second set of spacers contacts a portion of the first or second sidewall of the gate electrode.
Dependencies are inferred from the claim text.