Vertical-type non-volatile memory devices
AssigneeSamsung Electronics Co., Ltd.
InventorsYong-Hoon Son, Jong-Wook Lee
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Abstract
In a semiconductor device, and a method of manufacturing thereof, the device includes a substrate of single-crystal semiconductor material extending in a horizontal direction and a plurality of interlayer dielectric layers on the substrate. A plurality of gate patterns are provided, each gate pattern being between a neighboring lower interlayer dielectric layer and a neighboring upper interlayer dielectric layer. A vertical channel of single-crystal semiconductor material extends in a vertical direction through the plurality of interlayer dielectric layers and the plurality of gate patterns, a gate insulating layer being between each gate pattern and the vertical channel that insulates the gate pattern from the vertical channel.
Claims6
A semiconductor device comprising:
- a substrate extending in a horizontal direction;
- a plurality of interlayer dielectric layers on the substrate;
- a plurality of gate patterns, each gate pattern between a neighboring lower interlayer dielectric layer and a neighboring upper interlayer dielectric layer;
- a vertical channel extending in a vertical direction through the plurality of interlayer dielectric layers and the plurality of gate patterns;
- a gate insulating layer between each gate pattern and the vertical channel that insulates the gate pattern from the vertical channel;
- and
- a charge trapping layer between each corresponding gate pattern and gate insulating layer, the charge trapping layer including:
- a first portion extending in the vertical direction between the gate pattern and the gate insulating layer;
- a second portion extending in the horizontal direction between the gate pattern and the neighboring upper interlayer dielectric layer;
- and a third portion extending in the horizontal direction between the gate pattern and the neighboring lower interlayer dielectric layer.
Dependencies are inferred from the claim text.