US 7,679,131 B1 · Semiconductor device, manufacturing method thereof, and electronic device · patentgrep

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Abstract

A laser annealing method for obtaining a crystalline semiconductor film having a large grain size, and a method of manufacturing a semiconductor device using the crystalline semiconductor film, are provided. Using a shape change (convex portion or concave portion) of an amorphous semiconductor film when crystallizing the amorphous semiconductor film using irradiation of laser light, it is possible to intentionally regulate the origin of crystal growth, and to make the grain size large. By then designing the arrangement of an active layer (island shape semiconductor film) so as to contain at least a channel forming region within one grain, it becomes possible to improve the electrical characteristics of a TFT.

Claims30

Dependent claims

A semiconductor device comprising:

a TFT formed over a substrate;
an active layer formed in the TFT;
and
a first region, a second region and a third region formed in the active layer, the third region being formed between the first region and the second region,
wherein the third region includes a channel forming region,
wherein the third region has a first width and a second width,
wherein the first width and the second width of the third region are narrower than a width of the first region and a width of the second region,
wherein each of the first width and the second width of the third region is a length in a direction perpendicular to a carrier flow direction, and the direction of the first width and the direction of the second width are the same,
wherein each of the width of the first region and the width of the second region is a length in the direction perpendicular to the carrier flow direction,
wherein a portion of the third region is convexed or concaved in the direction perpendicular to the carrier flow direction, which is parallel to a plane of the substrate, the convexed portion being a part of the second width,
wherein the number of grain boundaries crossing the channel forming region in a width direction of the channel forming region is zero,
wherein the first width is narrower than the second width, and
wherein the convexed or concaved portion becomes an origin of crystal growth.

10 more elements

A semiconductor device comprising:

a TFT formed over a substrate;
an active layer formed in the TFT;
and
a first region, a second region and a third region formed in the active layer, the third region being formed between the first region and the second region,
wherein the third region includes a channel forming region,
wherein the third region has a first width and a second width,
wherein the first width and the second width of the third region are narrower than a width of the first region and a width of the second region,
wherein each of the first width and the second width of the third region is a length in a direction perpendicular to a carrier flow direction, and the direction of the first width and the direction of the second width are the same,
wherein each of the width of the first region and the width of the second region is a length in the direction perpendicular to the carrier flow direction,
wherein a portion of the third region is convexed or concaved in the direction perpendicular to the carder flow direction, which is parallel to a plane of the substrate, the convexed portion being a part of the second width,
wherein the number of grain boundary contained in the channel forming region is zero,
wherein the first width is narrower than the second width, and
wherein the convexed or concaved portion becomes an origin of crystal growth.

10 more elements

A semiconductor device comprising:

a semiconductor layer formed over a substrate;
and
a first region, a second region and a third region formed in the semiconductor layer, the third region being formed between the first region and the second region, wherein the third region includes a channel forming region,
wherein the third region has a first width and a second width,
wherein the first width and the second width of the third region are narrower than a width of the first region and a width of the second region,
wherein each of the first width and the second width of the third region is a length in a direction perpendicular to a carrier flow direction, and the direction of the first width and the direction of the second width are the same,
wherein each of the width of the first region and the width of the second region is a length in the direction perpendicular to the channel length direction,
wherein a portion of the third region is convexed in the direction perpendicular to the channel length direction and parallel to a plane of the substrate, the convexed portion being a part of the second width,
wherein the number of grain boundaries crossing the channel forming region in a width direction of the channel forming region is zero,
wherein the first width is narrower than the second width, and
wherein the convexed portion becomes an origin of crystal growth.

8 more elements

A semiconductor device comprising:

a semiconductor layer formed over a substrate;
and
a first region, a second region and a third region formed in the semiconductor layer, the third region being formed between the first region and the second region,
wherein the third region includes a channel forming region,
wherein the third region has a first width and a second width,
wherein the first width and the second width of the third region are narrower than a width of the first region and a width of the second region,
wherein each of the first width and the second width of the third region is a length in a direction perpendicular to a carrier flow direction, and the direction of the first width and the direction of the second width are the same,
wherein each of the width of the first region and the width of the second region is a length in the direction perpendicular to the channel length direction,
wherein a portion of the third region is concaved in the direction perpendicular to the channel length direction and parallel to a plane of the substrate, the channel forming region including the concaved portion and having the first width,
wherein the number of grain boundaries crossing the channel forming region in a width direction of the channel forming region is zero,
wherein the first width is narrower than the second width, and
wherein the concaved portion becomes an origin of crystal growth.

9 more elements

A semiconductor device comprising:

a semiconductor layer formed over a substrate;
and
a first region, a second region and a third region formed in the semiconductor layer, the third region being formed between the first region and the second region,
wherein the third region includes a channel forming region,
wherein the third region has a first width and a second width,
wherein the first width and the second width of the third region are narrower than a width of the first region and a width of the second region,
wherein each of the first width and the second width of the third region is a length in a direction perpendicular to a carrier flow direction, and the direction of the first width and the direction of the second width are the same,
wherein each of the width of the first region and the width of the second region is a length in the direction perpendicular to the carrier flow direction,
wherein a portion of the third region is convexed in the direction perpendicular to the carrier flow direction and parallel to a plane of the substrate, the convexed portion being a part of the second width,
wherein the number of grain boundaries crossing the channel forming region in a width direction of the channel forming region is zero,
wherein the first width is narrower than the second width, and
wherein the convexed portion becomes an origin of crystal growth.

9 more elements

A semiconductor device comprising:

a semiconductor layer formed over a substrate;
and
a first region, a second region and a third region formed in the semiconductor layer, the third region being formed between the first region and the second region,
wherein the third region includes a channel forming region,
wherein the third region has a first width and a second width,
wherein the first width and the second width of the third region are narrower than a width of the first region and a width of the second region,
wherein each of the first width and the second width of the third region is a length in a direction perpendicular to a carrier flow direction, and the direction of the first width and the direction of the second width are the same,
wherein each of the width of the first region and the width of the second region is a length in the direction perpendicular to the carrier flow direction,
wherein a portion of the third region is concaved in the direction perpendicular to the carrier flow direction and parallel to a plane of the substrate, the channel forming region including the concaved portion and having the first width,
wherein the number of grain boundaries crossing the channel forming region in a width direction of the channel forming region is zero,
wherein the first width is narrower than the second width, and
wherein the concaved portion becomes an origin of crystal growth.

9 more elements

Dependencies are inferred from the claim text.

Facts

Application: 09/651,889Filed 30 Aug 2000
Priority: JP 11-24425131 Aug 1999
Granted: 16 Mar 2010
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

H10D 86/60
Characterised by multiple TFTs: wherein the TFTs are in active matrices
H10D 86/0223
Comprising manufacture, treatment or patterning of TFT semiconductor bodies: comprising crystallisation of amorphous, microcrystalline or…
H10D 86/40
Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless…
H10D 86/421
Characterised by multiple TFTs: having a particular composition, shape or crystalline structure of the active layer

Family

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