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US 7,678,678 B2Granted
Method to chemically remove metal impurities from polycide gate sidewalls
AssigneeMicron Technology, Inc.
InventorsFernando Gonzalez, Don Carl Powell
Life of this patent
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Abstract
An embodiment includes a process of forming a gate stack that acts to resist the redeposition to the semiconductive substrate of mobilized metal such as from a metal gate electrode. An embodiment also relates to a system that achieves the process. An embodiment also relates to a gate stack structure that provides a composition that resists the redeposition of metal during processing and field use.
Claims25
A process of treating a semiconductor structure comprising:
- providing a substrate;
- providing a gate stack comprising a gate dielectric layer disposed over the substrate;
- a polysilicon layer disposed over the gate dielectric layer;
- a barrier layer disposed over the gate dielectric layer, and a metal film disposed over the polysilicon layer;
- and
- oxidizing the polysilicon layer under conditions including using a fluorine-containing composition disposed in a layer over the gate stack that reduce redeposition on the substrate and the gate stack of a volatilized portion of the metal film.
3 more elements
A process of treating a semiconductor structure comprising:
- providing a gate stack comprising a gate dielectric layer, a barrier layer, a polysilicon layer, and a metal film;
- and
- oxidizing the polysilicon layer under conditions including using a halogen-containing composition to reduce redeposition of metal on the gate stack.
A process comprising:
- forming a metal film over a structure;
- and
- thermally processing the structure in the presence of a first composition, such that the metal is more likely to combine with at least a portion of the first composition than with the structure, including combining a volatilized portion of the metal film with the first composition.
A process comprising:
- forming a doped polysilicon layer over a substrate;
- forming a barrier layer over the doped polysilicon layer;
- forming a metal film over the barrier layer;
- forming a nitride layer over the metal film;
- and
- thermally processing in the presence of a halogen-containing composition under conditions causing the metal film more likely to combine with the halogen-containing composition than with the polysilicon layer or the substrate, the thermal processing including combining a volatilized portion of the metal film with the halogen-containing composition.
3 more elements
A process comprising:
- forming a doped polysilicon layer over a substrate;
- forming a barrier layer over the doped polysilicon layer;
- forming a metal film over the barrier layer;
- forming a nitride layer over the metal film;
- and
- thermally processing in the presence of a halogen-containing composition under conditions causing the metal film more likely to combine with the halogen-containing composition than with the polysilicon layer or the substrate, wherein the halogen-containing composition comprises at least one of fluorine and NF3 in one of a gaseous or solid state, wherein the solid state fluorine composition comprises at least one of the nitride layer, the metal film and the barrier layer.
3 more elements
A process of forming a gate stack comprising:
- providing a substrate;
- forming a gate dielectric layer over the substrate;
- depositing a polysilicon layer over the gate dielectric layer;
- forming a metal film above the polysilicon layer;
- forming a cap layer over metal film;
- etching a gate stack through the cap layer, the metal film, and the polysilicon layer, using a halogen containing composition under conditions that reduce redeposition on the substrate of a volatilized portion of the metal film;
- and
- wherein at least one process of depositing a polysilicon layer, forming a metal film, and forming a cap layer is carried out in the presence of a metal-reducing composition.
5 more elements
A process of making a computer system, comprising:
- forming a processor;
- forming a memory system coupled to the processor;
- and
- forming an input/output circuit coupled to the processor and the memory system;
- wherein at least one of forming a processor and forming an input/output circuit include:
- providing a substrate;
- forming a gate dielectric layer over the substrate;
- depositing a polysilicon layer over the gate dielectric layer;
- forming a metal film above the polysilicon layer;
- forming a cap layer over metal film;
- etching a gate stack through the cap layer, the metal film, and the polysilicon layer, using a halogen containing composition under conditions that reduce redeposition on the substrate of a volatilized portion of the metal film;
- and
- wherein at least one process of depositing a polysilicon layer, forming a metal film, and forming a cap layer is carried out in the presence of a metal-reducing composition.
10 more elements
Dependencies are inferred from the claim text.