Structure and method for improved SRAM interconnect
AssigneeInternational Business Machines Corporation
InventorsHaining Yang, Robert C. Wong
Life of this patent
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Abstract
A method of forming an improved static random access memory (SRAM) interconnect structure is provided. The method includes forming a sidewall spacer around a periphery of a patterned poly-silicon layer formed over a silicon layer of a semiconductor substrate; removing the patterned poly-silicon layer for exposing a portion of a cap layer; etching the exposed portion of the cap layer for revealing a portion of the silicon layer; etching the portion of the silicon layer, in which a portion of said silicon layer connects at least a portion of pull-down device of said SRAM to at least a portion of pull-up device of said SRAM; forming a gate oxide; and forming a gate conductor over the gate oxide. An interconnect structure is also provided.
Claims9
A method of forming a static random access memory (SRAM) interconnect structure, the method comprising:
- forming a sidewall spacer around a periphery of a patterned poly-silicon layer formed over a silicon layer of a semiconductor substrate;
- etching a portion of said silicon layer, in which said portion of said silicon layer connects at least a portion of a pull-down device of said SRAM to said at least a portion of a pull-up device of said SRAM;
- forming a gate oxide;
- forming a gate conductor over said gate oxide, wherein said forming said sidewall spacer includes depositing a cap layer on said silicon layer;
- depositing a poly-silicon layer on said cap layer;
- patterning said poly-silicon layer to reveal a portion of said cap layer for producing a sidewall of said poly-silicon layer;
- and forming a spacer on said sidewall of said poly-silicon layer.
A method of forming an improved static random access memory (SRAM) interconnect structure, the method comprising:
- forming a sidewall spacer around a periphery of a patterned poly-silicon layer formed over a silicon layer of a semiconductor substrate;
- removing said patterned poly-silicon layer, wherein said removing of said patterned poly-silicon layer reveals a portion of a cap layer formed over said silicon layer;
- etching said portion of said cap layer for revealing a portion of said silicon layer;
- etching said portion of said silicon layer;
- forming a gate oxide;
- forming a gate conductor over said gate oxide, wherein said forming a sidewall spacer includes:
- depositing a cap layer on said silicon layer;
- depositing a poly-silicon layer on said cap layer;
- patterning said poly-silicon layer to reveal a portin of said cap layer for producing a sidewall of said poly-silicon layer;
- and forming a spacer on said sidewall of said poly-silicon layer.
Dependencies are inferred from the claim text.