Method of forming wiring pattern and method of forming gate electrode for TFT
AssigneeSeiko Epson Corporation
InventorsToshimitsu Hirai, Shinri Sakai
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AssigneeSeiko Epson Corporation
InventorsToshimitsu Hirai, Shinri Sakai
Estimating the term…
The invention provides a method of forming a wiring pattern in which a conductive material layer is formed in a pattern formation region having a first region, which is bordered by a bank pattern and has a first width, and a second region, which touches the first region and has a second width smaller than the first width, on a substrate, by discharging a droplet of a conductive material in a liquid phase using a droplet discharge device. The method includes forming the conductive material layer to cover the first region and the second region, by discharging the droplet having a diameter smaller than the first width and greater than the second width toward the first region. In this case, the droplet is discharged such that the droplet lands at a position that faces a boundary line between the first region and the second region.
A method of forming a wiring pattern, in which a conductive material layer is formed on a substrate by discharging a plurality of droplets of a conductive material in a liquid phase using a droplet discharge device in a pattern formation region having:
A method of forming a wiring pattern, in which a conductive material layer is formed on a substrate by discharging a plurality of droplets of a conductive material in a liquid phase using a droplet discharge device in a pattern formation region having:
Dependencies are inferred from the claim text.