US 7,673,260 B2 · Modeling device variations in integrated circuit design

Abstract

DFM systems are provided that incorporate manufacturing variations in the analysis of integrated circuits by calculating predicted manufacturing variations on the shapes of interconnects and devices of the drawn layout of a circuit design. The shape variation on interconnects is converted to variations in resistor-capacitor (RC) parasitics. The shape variation on devices is converted to variations in device parameters. The variation in device parameters and wire parasitics is converted to changes in timing performance, signal integrity, and power consumption by determining the impact of device parameter and wire parasitic variations on the behavior of each instance of a standard cell. The results from these analyses are integrated back into the design flow as incremental delay files (timing), noise failures and buffer insertion/driver resizing commands (noise), and leakage power hotspots and cell substitution commands (power consumption).

Claims46

Dependent claims

A method comprising:

receiving design data of a circuit, the design data including device models comprising a first parameter, the device models representing one or more devices of the circuit;
generating a first equation of a current density at each location of a plurality of locations across a gate width, wherein the step of generating the first equation is performed on a computer;
using the first equation to generate an equivalent parameter representing a summation of the first parameter with a delta parameter, the equivalent parameter accounting for spatial variations in the device;
generating the delta parameter corresponding to a parameter of a device, wherein the delta parameter is generated to preserve operational behavior of the device under an operating condition;
and
modifying the device model to generate a modified device model by replacing the parameter of the device model with the equivalent parameter.

3 more elements

A computer aided design system, comprising:

an input device configured to receive design data of a circuit, the design data including device models comprising a first parameter, the device models representing one or more devices of the circuit;
a computer readable medium communicatively coupled to the input device and a processor, the computer readable medium having computer executable program code embodied thereon, the computer executable program code configured to cause the computer aided design system to perform the functions of:
generating a first equation of a current density at each location of a plurality of locations across a gate width;
using the first equation to generate an equivalent parameter representing a summation of the first parameter with a delta parameter, the equivalent parameter accounting for spatial variations in the device;
generating the delta parameter corresponding to a parameter of a device, wherein the delta parameter is generated to preserve operational behavior of the device under an operating condition;
and
modifying the device model to generate a modified device model by replacing the parameter of the device model with the equivalent parameter;
and
an output device communicatively coupled to the computer readable medium and the processor and configured to provide the modified device model.

6 more elements

Dependencies are inferred from the claim text.

Modeling device variations in integrated circuit design

Life of this patent

Modeling device variations in integrated circuit design

Life of this patent

Abstract

Claims46