Plasma implantated impurities in junction region recesses

A system comprising:

• a semiconductor microprocessor electronically and physically coupled to a printed circuit board, the microprocessor comprising a transistor, the transistor comprising:
• a substrate having a well;
• a device on the substrate comprising:
• a gate electrode on a top surface of the substrate, a first junction recess in the substrate adjacent the gate electrode, and a different second junction recess in the substrate adjacent the gate electrode;
• and
• a first conformal depth of a first impurity material comprising carbon (C) and a different second conformal depth of a second impurity material comprising arsenic (As) in a first base surface of the substrate defined by the first junction recess and having a depth less than a depth of the well, and the first conformal depth of the first impurity material comprising carbon (C) and the second conformal depth of the second impurity material comprising arsenic (As) in a second base surface of the substrate defined by the second junction recess and having a depth less than a depth of the well.

An apparatus comprising:

• a substrate having a well;
• a device on the substrate comprising a gate electrode on a top surface of the substrate, a first junction recess in the substrate adjacent the gate electrode, and a second junction recess in the substrate adjacent the gate electrode;
• a first conformal depth of a first impurity comprising carbon (C) and a different second conformal depth of a second impurity comprising arsenic (As) in a first surface of a substrate defined by the first junction recess and having a depth less than a depth of the well;
• and
• the first conformal depth of the first impurity comprising carbon (C) and the different second conformal depth of the second impurity comprising arsenic (As) in a second surface of the substrate defined by the second junction recess and having a depth less than a depth of the well.