Method and apparatus enabling concurrent processing of contiguously and virtually concatenated payloads
AssigneeIntel Corporation
InventorsJuan-Carlos Calderon, Soowan Suh, Jing Ling, Jean-Michel Caia, Alejandro Lenero Beracoechea
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Abstract
A method and apparatus for processing at least two types of payloads received at varying intervals in a communications network using a single processing path is provided. The two types of payloads may include virtually and contiguously concatenated payloads according to SONET/SHD architecture. The method comprises interleaving data in a predetermined format and controlling distribution of the data irrespective of the format received such that the data can be processed at the destination and passed to downstream components.
Claims25
A method for interleaving virtually concatenated and contiguously concatenated data, comprising:
- assigning a virtually concatenated data payload and a contiguously concatenated data payload to time slots in a received order in a first set of hardware data banks in a fiber optics network, wherein the virtually concatenated data payload is variable in size to match a client service data rate, and wherein the contiguously concatenated data payload is fixed in size;
- and
- distributing the data from time slots in the received order in the first set of hardware banks to time slots in a generic order in a second set of hardware data banks such that contiguous data is included in each time slot;
- wherein said distributing is performed by a control memory and comprises
- determining a group format for the data,
- determining time slots to be employed based on the group format, and
- allocating data to only those time slots to be employed based on the group format.
An apparatus for interleaving virtually concatenated and contiguously concatenated data irrespective of format received without substantially interrupting data flow, comprising:
- a plurality of memory buffers, each memory buffer holding a quantity of received data;
- and
- a plurality of control memories comprising a first control memory having an ability to select output data from the plurality of memory buffers within a fixed data boundary, and a second control memory having an ability to store a different configuration without interrupting operation of the first control memory, and an additional ability to switch functionality of the first control memory and the second control memory.
A system comprising:
- a physical layer interface;
- a framer comprising:
- a plurality of memory buffers, each memory buffer holding a quantity of received data;
- and
- a plurality of control memories comprising a first control memory having an ability to select output data from the plurality of memory buffers within a fixed data boundary, and a second control memory having an ability to store a different configuration without interrupting operation of the first control memory, and an additional ability to switch functionality of the first control memory and the second control memory;
- a network processor;
- and
- an interface to at least provide intercommunication between the framer and the network processor.
Dependencies are inferred from the claim text.