# US 7,653,053 B2 · Programmable bit rates in a constant bandwidth TDM switch

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- Number: US 7,653,053 B2
- Document ID: US7653053B2
- Status: Granted
- Kind: B2
- Application number: 10/888,998
- Filed: 2004-07-13
- Published: 2005-02-03
- Granted: 2010-01-26
- Earliest claimed: 2003-07-29
- Assignees: Zarlink Semiconductor Inc.
- Inventors: Paul Gresham
- Web page: https://patentgrep.com/patent/US7653053B2

## CPC

- H04Q 11/04: for time-division multiplexing {(H04Q11/0001 takes precedence)}
- H04Q 2213/1302: Relay switches
- H04Q 2213/13036: Serial/parallel conversion, parallel bit transmission
- H04Q 2213/1304: Coordinate switches, crossbar, 4/2 with relays, coupling field
- H04Q 2213/13292: Time division multiplexing, TDM
- H04Q 2213/13297: Coupling different rates in TDM systems, data rate adaptation
- H04Q 2213/13305: Transistors, semiconductors in general
- H04Q 2213/1332: Logic circuits
- H04Q: SELECTING (switches, relays, selectors H01H; wireless communication networks H04W)

## Abstract

A method and a TDM digital switch are provided for switching data at a variety of data rates. Input streams having a data rate less than the maximum data rate of the switch are grouped and multiplexed to form multiplexed streams carrying data at the maximum data rate. A switching state machine switches the data from each input stream to form grouped output streams comprising multiplexed output streams, each grouped output stream carrying data at the maximum data rate. The grouped output streams are demultiplexed, and the output streams transmitted through respective output shift registers. The method and TDM digital switch allow streams with programmable data rates to be switched while still maximizing use of resources, including memory, within the switch.

## Claims

### Claim 1

A method of switching a plurality of parallel input Time Division Multiplexing (TDM) streams to a plurality of parallel output TDM streams, each parallel input TDM stream having an input data rate not greater than a maximum data rate, the method comprising the steps of:
a. grouping the parallel input TDM streams into a plurality of subsets, the parallel input TDM streams in each subset having a common input data rate associated with the subset, at least one subset having an input rate less than the maximum data rate and less than the input data rate of at least one other parallel input stream;
b. multiplexing, by a data selector, the parallel input TDM streams within each subset having an input data rate less than the maximum data rate to generate a respective grouped input stream;
c. storing within a data memory data from each grouped input stream in a separate row of the data memory in the order in which the data occurs within the grouped input stream;
d. determining a mapping between the parallel input TDM streams and the parallel output TDM streams;
e. generating by a switching state machine a plurality of grouped output streams from the mapping such that each grouped output stream includes data from at least one parallel input TDM stream; and
f. demultiplexing, by an output holding register, each grouped output stream which includes data from at least two parallel input TDM streams to generate a respective plurality of parallel output TDM streams.

### Claim 2 (depends on 1)

The method of claim 1 further comprising the steps of:
a. receiving a plurality of serial input TDM streams;
b. generating each parallel input stream from a corresponding one of the serial input TDM streams;
c. for each parallel output TDM stream, generating a respective serial output TDM stream; and
d. transmitting the plurality of serial output TDM streams.

### Claim 3 (depends on 1)

The method of claim 1 wherein each grouped input stream has an internal data rate defined as the sum of the input data rates of all the parallel input TDM streams used to generate the grouped input stream, and equal to the maximum data rate.

### Claim 4 (depends on 1)

The method of claim 1 wherein the step of grouping the parallel input TDM streams into a plurality of subsets comprises grouping parallel input TDM streams into the plurality of subsets such that the sum of the input data rates of all parallel input TDM streams in each subset is equal to the maximum data rate.

### Claim 5 (depends on 1)

The method of claim 1 wherein the input data rate of each parallel input TDM stream is one of a set of programmable data rates.

### Claim 6 (depends on 5)

The method of claim 5 wherein the set of programmable data rates consists of data rates forming a geometric series.

### Claim 7 (depends on 6)

The method of claim 6 wherein the set of programmable data rates includes the data rates 65 MB/s, 32 MB/s, and 16 MB/s.

### Claim 8

A time division multiplexing (TDM) digital switch adapted to receive a plurality of serial input TDM streams and to transmit a plurality of serial output TDM streams, each serial input TDM stream having a respective input data rate not greater than a maximum data rate, the TDM digital switch comprising:
a. a plurality of input shift registers, each for receiving a corresponding one of the serial input TDM streams and generating a corresponding parallel input stream, each parallel input stream belonging to one of a plurality of parallel input stream subsets (PIS subsets);
b. a plurality of output shift registers, each for receiving a corresponding parallel output stream and transmitting a corresponding one of the serial output TDM streams at a respective output data rate
c. a data selector for multiplexing the parallel input streams in each PIS subset which includes more than one parallel input stream, to generate a corresponding grouped input stream, each grouped input stream thereby being associated with one of the PIS subsets;
d. a data memory, wherein the data selector populates the data memory by storing data from each grouped input stream in a separate row of memory, in the order in which the data occurs within the grouped input stream;
e. means for generating at least one grouped output stream, each grouped output stream including data from at least two of the parallel input streams; and
f. means for demultiplexing each grouped output stream to generate a subset of parallel output streams, thereby associating each output shift register with one of the grouped output streams.

### Claim 9 (depends on 8)

The TDM digital switch of claim 8 wherein each input shift register is adapted to receive the corresponding serial input TDM stream at one of a set of programmable data rates, and wherein each output shift register is adapted to transmit the corresponding serial output TDM stream at one of the set of programmable data rates.

### Claim 10 (depends on 9)

The TDM digital switch of claim 9 wherein the set of programmable data rates includes 65 MB/s, 32 MB/s, and 16 MB/s.

### Claim 11 (depends on 8)

The TDM digital switch of claim 8 wherein the data selector is adapted to generate each grouped input stream such that the sum of the input data rates of all parallel input streams within the PIS subset associated with the grouped input stream is equal to the maximum data rate.

### Claim 12 (depends on 11)

The TDM digital switch of claim 11 wherein the data selector is adapted to multiplex the parallel input streams by time division multiplexing the parallel input streams in each PIS subset, each parallel input stream in a PIS subset having a common input data rate corresponding to the PIS subset, thereby populating each grouped input stream with data from each parallel input stream in turn for each of a plurality of timeslots.

### Claim 13 (depends on 12)

The TDM digital switch of claim 12 wherein the means for generating at least one grouped output stream comprises:
a. a connection memory for storing a respective connection address for each timeslot and for each output shift register; and
b. a switching state machine for, for each grouped output stream, retrieving data from the data memory as indicated by the connection address associated with a current timeslot and each output shift register associated with the grouped output stream.

### Claim 14 (depends on 13)

The TDM digital switch of claim 13 wherein the connection memory stores connection addresses for each grouped output stream in a separate row of memory, for each parallel output stream associated with the grouped output stream in turn, for each of the plurality of timeslots.

### Claim 15 (depends on 14)

The TDM digital switch of claim 14 wherein the means for demultiplexing grouped output streams comprise:
a. a plurality of ordered stages within a pipe; and
b. means for periodically: receiving data from each grouped output stream and storing the data in the first stage; transferring data between stages within the pipe as specified by the ordering of the stages; and transferring data for each grouped output stream from each stage to an output shift register corresponding to the stage and to the grouped output stream.

### Claim 16 (depends on 15)

The TDM digital switch of claim 15 further comprising an enabling circuit for periodically generating a group enable signal to indicate to each output shift register whether to transmit data.

### Claim 17 (depends on 16)

The TDM digital switch of claim 16 wherein the enabling circuit is adapted to generate the group enable signal such that for each grouped output stream, the group enable signal indicates to a number of output shift registers associated with the grouped output stream to transmit data, the number of output shift registers being such that the sum of the output data rates of the output shift registers is equal to the maximum data rate.

### Claim 18 (depends on 8)

The TDM digital switch of claim 8 further comprising an enabling circuit for periodically generating a group enable signal to indicate to each output shift register whether to transmit data.

### Claim 19 (depends on 18)

The TDM digital switch of claim 18 wherein the enabling circuit is adapted to generate the group enable signal such that for each grouped output stream, the group enable signal indicates to a number of output shift registers associated with the grouped output stream to transmit data, the number of output shift registers being such that the sum of the output data rates of the output shift registers is equal to the maximum data rate.