Strained semiconductor power device and method

A method for forming a semiconductor (SC) device embodying a strained semiconductor, comprising:

• providing a substrate;
• providing a transition layer adapted to lie between an upper surface of the substrate and a relaxed semiconductor region and having a first lattice spacing adjacent the upper surface of the substrate and a second different lattice spacing adjacent the relaxed semiconductor region;
• forming over the transition layer the relaxed semiconductor region having an outer surface and a trench therein extending from the outer surface to the transition layer;
• filling the trench with a strained semiconductor material;
• and
• providing device regions proximate the outer surface and the trench adapted to direct device current through the strained semiconductor material in the trench to the transition layer and the substrate.

A method for forming a semiconductor (SC) device embodying a strained semiconductor, comprising:

• providing a substrate;
• forming over the substrate a relaxed semiconductor region having an outer surface and a trench therein extending from the outer surface to the substrate, wherein the relaxed semiconductor region comprises SiGe;
• filling the trench with a strained semiconductor material, wherein the strained semiconductor material is substantially silicon;
• and
• providing device regions proximate the outer surface and the trench adapted to direct device current through the strained semiconductor material in the trench to the substrate.

A method for forming VDMOS devices, comprising:

• providing a substrate having a first surface and a first composition at the first surface;
• forming a transition layer having a composition at the first surface substantially matching the first composition and having a different second composition at a second surface opposed to the first surface;
• forming a relaxed semiconductor on the second surface, having a composition substantially matching the second composition, having a third surface opposite the second surface, and having two spaced-apart portions separated by a trench extending from the third surface to the second surface;
• providing a strained semiconductor in the trench in contact with the second surface and extending to a fourth surface substantially coplanar with the third surface or above and substantially parallel with the third surface;
• and
• forming device regions with sources and a gate proximate the fourth surface and straddling the trench and a drain coupled to the substrate, adapted to cause device current to flow from the sources to the drain via the strained semiconductor in the trench.

A method for forming VDMOS devices, comprising:

• providing a substrate having a first surface and a first composition at the first surface;
• forming a transition layer having a composition at the first surface substantially matching the first composition and having a different second composition at a second surface opposed to the first surface;
• forming a relaxed semiconductor on the second surface, having a composition substantially matching the second composition, having a third surface opposite the second surface, and having two spaced-apart portions separated by a trench extending from the third surface to the second surface;
• providing a strained semiconductor in the trench in contact with the second surface and extending to a fourth surface substantially coplanar with the third surface or above and substantially parallel with the third surface, wherein the strained semiconductor is provided in the trench and in an overlap region extending over at least part of the two spaced-apart portions of the relaxed semiconductor, so that the fourth surface is above and substantially parallel with the third surface;
• and
• forming device regions with sources and a gate proximate the fourth surface and straddling the trench and a drain coupled to the substrate, wherein the sources are formed in and the gate is formed over the overlap region, and the device regions are adapted to cause device current to flow from the sources to the drain via the strained semiconductor in the trench.