Method and system for verification of circuits with encoded signals

A computer implemented method for verifying a circuit design, the circuit design having a portion corresponds to an encoded signal, comprising:

• decoding by a decoder the encoded signal to produce a decoded signal;
• determining by a processor a correspondence between the decoded signal of the circuit design and a second signal of a second circuit design;
• comparing the decoded signal to the second signal to perform verification upon the circuit design, in which decoding logic and encoding logic are inserted into one or more paths of the carry-save signal, in which the decoding logic and the encoding logic are explicitly inserted by an actual modification to a circuit representation of the circuit design or are implicitly inserted without actual modification to the circuit representation of the circuit design but causing realization of the encoding and the decoding logics;
• and
• storing the decoded signal in a volatile or non-volatile computer readable medium or displaying the decoded signal on a display device.

A volatile or non-volatile computer usable medium comprising instructions for performing a process by a processor for verifying a circuit design, the circuit design having a portion corresponds to an encoded carry-save signal, the process comprising the acts of:

• decoding by a decoder the encoded carry-save signal to produce a decoded carry-save signal;
• determining a correspondence between the decoded carry-save signal of the circuit design and a second signal of a second circuit design;
• comparing the decoded carry-save signal to the second signal to perform verification upon the circuit design, in which decoding logic and encoding logic are inserted into one or more paths of the carry-save signal, in which the decoding logic and the encoding logic are explicitly inserted by an actual modification to a circuit representation of the circuit design or are implicitly inserted without actual modification to the circuit representation of the circuit design but causing realization of the encoding and the decoding logics;
• and
• storing the decoded carry-save signal or displaying the decoded carry-save signal on a display device.

A system for verifying a circuit design, the circuit design having a portion corresponds to an encoded carry-save signal, the system comprising:

• a decoder for decoding the encoded carry-save signal to produce a decoded carry-save signal;
• means for determining a correspondence between the decoded carry-save signal of the circuit design and a second signal of the second circuit design;
• a processor for comparing the decoded carry-save signal to the second signal to perform verification upon the circuit design, in which decoding logic and encoding logic are inserted into one or more paths of the carry-save signal, in which the decoding logic and the encoding logic are explicitly inserted by an actual modification to a circuit representation of the circuit design or are implicitly inserted without actual modification to the circuit representation of the circuit design but causing realization of the encoding and the decoding logics;
• and
• a volatile or non-volatile computer readable medium for storing the decoded carry-save signal or a display device for displaying the decoded carry-save signal.

A volatile or non-volatile computer usable medium comprising instructions for performing a process by a processor for verifying a circuit design, the circuit design having a portion corresponds to an encoded signal, the process comprising the acts of:

• decoding by a decoder the encoded signal to produce a decoded signal;
• determining a correspondence between the decoded signal of the circuit design and a second signal of the second circuit design;
• comparing the decoded signal to the second signal to perform verification upon the circuit design, in which decoding logic and encoding logic are inserted into one or more paths of the carry-save signal, in which the decoding logic and the encoding logic are explicitly inserted by an actual modification to a circuit representation of the circuit design or are implicitly inserted without actual modification to the circuit representation of the circuit design but causing realization of the encoding and the decoding logics, and
• storing the decoding signal or displaying the decoder signal on a display device.

A system for verifying a circuit design, the circuit design having a portion corresponds to an encoded signal, the system comprising:

• a decoder for decoding the encoded signal to produce a decoded signal;
• a processor for determining correspondence between the decoded signal of the circuit design and a second signal of the second circuit design;
• means for comparing the decoded signal to the second signal to perform verification upon the circuit design, in which decoding logic and encoding logic are inserted into one or more paths of the carry-save signal, in which the decoding logic and the encoding logic are explicitly inserted by an actual modification to a circuit representation of the circuit design or are implicitly inserted without actual modification to the circuit representation of the circuit design but causing realization of the encoding and the decoding logics;
• and
• a volatile or non-volatile computer readable medium for storing the decoded carry-save signal or a display device for displaying the decoded carry-save signal.