Efficient parallel cyclic redundancy check calculation using modulo-2 multiplications

A system for cyclic redundancy checks (CRC) having a CRC polynomial of width (W), comprising:

• a controller capable of:
• receiving a message ({right arrow over (m)});
• decomposing the message ({right arrow over (m)}) into a series of smaller blocks ({right arrow over (b)}i) of size (M) and unit vectors ({right arrow over (e)}i);
• and
• performing a summation operation on the blocks ({right arrow over (b)}i) given by
• CRC
• ⁢
• (
• ⁢
• b
• ->
• ⁢
• )
• =
• ∑
• b
• i
• ·
• CRC
• ⁢
• (
• ⁢
• e
• ->
• i
• ⁢
• )
• ,
• wherein the CRC of the unit vectors (CRC({right arrow over (e)}i)) is stored in a lookup table.

For use in a signal processing system, a process for cyclic redundancy checks (CRC), comprising:

• decomposing a message ({right arrow over (m)}) into a series of smaller blocks ({right arrow over (b)}i) of size (M) and unit vectors ({right arrow over (e)}i);
• and
• performing a summation operation on the blocks ({right arrow over (b)}i), wherein the operation is given by
• CRC
• ⁢
• (
• ⁢
• b
• ->
• ⁢
• )
• =
• ∑
• b
• i
• ·
• CRC
• ⁢
• (
• ⁢
• e
• ->
• i
• ⁢
• )
• .