Method and system for hardware accelerator for implementing f8 confidentiality algorithm in WCDMA compliant handsets

A system for implementing the f8 confidentiality algorithm, the system comprising:

• one or more circuits that are operable to initialize a keystream generator with input variables for implementing f8 confidentiality algorithm;
• said one or more circuits are operable to generate an intermediate value, which is utilized to generate an output keystream, based on at least a portion of said input variables, a confidentiality key and a key modifier;
• said one or more circuits are operable to generate a first processing block of output bits and a signal indicating when said first processing block of output bits is generated;
• said one or more circuits are operable to receive a signal indicating that at least one additional processing block of output bits is to be generated and a signal which indicates that an immediately generated previous processing block of output bits is generated, wherein said signal indicating that at least one additional processing block of output bits is to be generated is based on at least one of said input variables which defines an input bitstream length;
• and
• said one or more circuits are operable to generate said at least one additional processing block of output bits utilizing said immediately generated previous processing block of output bits, said generated intermediate value, said confidentiality key, and an indication of which processing block of output bits is being processed.