Method and apparatus for testing a memory device with a redundant self repair feature
AssigneeXilinx, Inc.
InventorsYuezhen Fan, Zhi-Min Ling, Arnold A. Cruz
Life of this patent
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Abstract
A test methodology for testing a memory device with a RSR feature is disclosed. For example, a method for testing a memory device having at least one memory cell group, at least one redundant memory cell group, and a defect detect register is disclosed. In one embodiment, the method applies at least one memory test to the at least one memory cell group; and applies a defect detect register test to the defect detect register.
Claims20
A method for testing an integrated circuit including a memory device, wherein said memory device comprises at least one memory cell group, at least one redundant memory cell group, and a defect detect register, comprising:
- applying at least one memory test to said at least one memory cell group;
- and
- applying a defect detect register test to said defect detect register to determine if at least one bit of said defect detect register is defective.
A computer-readable medium having stored thereon a plurality of instructions, the plurality of instructions including instructions which, when executed by a processor, cause the processor to perform the steps of a method for testing an integrated circuit including a memory device, wherein said memory device comprises at least one memory cell group, at least one redundant memory cell group, and a defect detect register, comprising:
- applying at least one memory test to said at least one memory cell group;
- and
- applying a defect detect register test to said defect detect register to determine if at least one bit of said defect detect register is defective.
An apparatus for testing an integrated circuit including a memory device, wherein said memory device comprises at least one memory cell group, at least one redundant memory cell group, and a defect detect register, comprising:
- means for applying at least one memory test to said at least one memory cell group;
- and
- means for applying a defect detect register test to said defect detect register to determine if at least one bit of said defect detect register is defective.
Dependencies are inferred from the claim text.