US 7,626,650 B2Granted

Liquid crystal display panel manufacturing method and liquid crystal display panel

AssigneeFuture Vision Inc.

InventorYoshikazu Yoshimoto

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Abstract

The present invention provides a technique, by which it is possible to obtain a liquid crystal display panel with high precision by forming very fine pattern of electroconductive film through linking of the areas with different widths, and it is also possible to reduce the number of processes. Like a wide-width electroconductive film and a narrow-width electroconductive film, most of the surface of an underlying film UW of a thin-film transistor substrate SUB1 is turned to lyophobic portion RA, and only the narrow-width gate electrode forming area is turned to lyophilic portion FA. An electroconductive ink is dropped evenly to the gate electrode forming area of the lyophilic portion FA, and a wide-width gate line is formed on the gate line forming area GLA of lyophobic portion RA by direct drawing of IJ. The film thickness of the ink films on the gate electrode forming area GTA and the gate line forming area GLA are controlled by adjusting a dropping amount of the ink on each area, and film thicknesses of these areas obtained on the liquid crystal display panel after baking are adjusted to be equal with each other.

Claims15

Dependent claims

A method for manufacturing a liquid crystal display panel, comprising a liquid crystal between a first substrate and a second substrate, and pixels with thin-film transistor arranged in form of matrix on said first insulation substrate, said method comprises:

a process for performing lyophobic-lyophilic processing by turning most of the surface of said first substrate where said thin-film transistor is formed to lyophobic property including a portion where electroconductive film with wide width is formed by direct drawing of electroconductive ink and by turning the surface to lyophilic property including a portion to form an electroconductive film with narrow width where the electroconductive ink cannot be applied by direct drawing;
a process for forming an ink film on the electroconductive portion with narrow width for obtaining an ink film to prepare the electroconductive film with narrow width with a film thickness as required by dropping an electroconductive ink to a portion where said electroconductive film with narrow width is formed, and by pouring the electroconductive ink of lyophilic property to a portion where the electroconductive film with narrow width is formed;
a process for forming an ink film on an electroconductive portion with wide width to obtain an ink film for forming an electroconductive film of wide width with film thickness as required by dropping an electroconductive ink to a portion where the electroconductive film of wide width is formed by direct drawing;
and
a process for baking an ink film to prepare the electroconductive film with narrow width and the electroconductive film with wide width by baking of said electroconductive ink film with narrow width and said electroconductive ink film with wide width;
wherein said processes are carried out in the order described herein.

3 more elements

a process for performing lyophobic-lyophilic processing by turning most of the surface of said first substrate where said thin-film transistor is formed to lyophobic property including a portion where electroconductive film with wide width is formed by direct drawing of electroconductive ink and by turning the surface to lyophilic property including a portion to form an electroconductive film with narrow width where the electroconductive ink cannot be applied by direct drawing;
a process for forming an ink film on an electroconductive portion with wide width to obtain an ink film for forming an electroconductive film of wide width with film thickness as required by dropping an electroconductive ink to a portion where the electroconductive film of wide width is formed by direct drawing;
a process for forming an ink film on the electroconductive portion with narrow width for obtaining an ink film to prepare the electroconductive film with narrow width with a film thickness as required by dropping an electroconductive ink to a portion where said electroconductive film with narrow width is formed, and by pouring the electroconductive ink of lyophilic property to a portion where the electroconductive film with narrow width is formed;
and
a process for baking an ink film to prepare the electroconductive film with narrow width and the electroconductive film with wide width by baking of said electroconductive ink film with narrow width and said electroconductive ink film with wide width;
wherein said processes are carried out in the order described herein.

3 more elements

A method for manufacturing a liquid crystal display panel comprising a liquid crystal between a first substrate and a second substrate, and pixels with thin-film transistors in the form of a matrix on said first substrate, said method comprising:

performing lyophobic-lyophilic processing by turning most of a surface of said first substrate where said thin-film transistors is formed to a lyophobic property including a portion where as electroconductive film with a wide width is formed by direct drawing of an electroconductive ink, and by turning the surface to a lyophilic property including a portion to form an electroconductive film with a narrow width where the electroconductive ink cannot be applied by direct drawing;
forming an ink file on an electroconductive portion with a wide width by dropping an electroconductive ink to a portion where the electroconductive film of the wide width is formed by direct drawing;
forming an ink film on the electroconductive portion with a narrow width by dropping an electroconductive ink to a portion where the electroconductive film with the narrow width is formed;
and
baking the ink film to prepare an electroconductive film with a narrow width and an electroconductive film with a wide width.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application: 11/859,022Filed 21 Sep 2007
Priority: JP 2006-25532121 Sep 2006
Published: US 2008/0074573 A127 Mar 2008
Granted: 1 Dec 2009
Term ends: Not estimatedThe source records don’t support an estimate.

Classification7 codes

G02F 1/136286
Active matrix addressed cells: wiring, e.g. gate line, drain line
H10D 86/0241
Of multiple TFTs: using liquid deposition, e.g. printing
H10D 86/441
Characterised by multiple TFTs: interconnections, e.g. scanning lines
H10D 86/60
Characterised by multiple TFTs: wherein the TFTs are in active matrices