An electrostatic discharge protection structure for use in a liquid crystal display having a pixel array and a plurality of drive circuits, the pixel array having a plurality of thin-film transistors each having a gate, a source and a drain, a plurality of gate lines, each electrically connected to the gate of the corresponding transistor, and a plurality of data lines each electrically connected to the source/drain of the corresponding transistor, each drive circuit having an input/output terminal electrically connected to the gate lines and the data lines, the electrostatic discharge protection structure comprising:
- an electrostatic discharge bus;
- a plurality of first electrostatic discharge protection devices, each first discharge protection device being electrically connected to the gate of the corresponding transistor and the electrostatic discharge bus;
- a plurality of second electrostatic discharge protection devices, each second electrostatic discharge protection devices being electrically connected to the source/drain of the corresponding transistor and the electrostatic discharge bus;
- and
- a plurality of third electrostatic discharge protection devices, each third electrostatic discharge protection devices being electrically connected to the input/output terminals of the corresponding drive circuit and the electrostatic discharge bus;
- wherein each of the first, second and third electrostatic discharge protection devices comprising a glass substrate and a semiconductor substrate formed on the glass substrate, the semiconductor substrate being formed with a first, a second, a third and a fourth doping regions, which are formed within the semiconductor substrate in series, each being one of a P-type doping region, an N-type doping region and an intrinsic region, and two of the adjacent doping regions are of different types.