Method for feedback circuit design
AssigneePower Integrations, Inc.
InventorsArkady Akselrod, Sameer G. Kelkar
Life of this patent
Estimating the term…
Abstract
A method and system for feedback circuit design are disclosed. In one aspect, a method of feedback circuit design includes simulating a reference circuit design having a feedback stage at a target crossover frequency, determining an initial phase margin at the target crossover frequency, and adding an impedance network to the feedback stage if the initial phase margin is less than a threshold phase margin. The design of the impedance network is determined such that the initial phase margin is increased.
Claims25
A computer-implemented method, comprising:
- simulating, on a computer, a reference circuit design at a target crossover frequency, the reference circuit design representing a power supply circuit that includes a feedback stage to regulate an output of a power supply;
- determining, with the computer, an initial phase margin of the reference circuit design;
- adjusting, with the computer, a value of a gain limiter of the reference circuit design to limit a loop gain of the reference circuit design, wherein the gain limiter is a resistor and wherein adjusting the value of the gain limiter includes adjusting a value of the resistor and wherein an initial phase margin curve of the reference circuit design is substantially unaffected in response to adjusting the value of the gain limiter;
- and then
- adding, with the computer, an impedance network to the feedback stage in response to comparing the initial phase margin of the reference circuit design at the target crossover frequency with a threshold phase margin, the impedance network to increase the initial phase margin, wherein the impedance network is coupled in parallel with the gain limiter, and wherein adding the impedance network to the feedback stage further includes calculating a capacitance value of an impedance component of the impedance network in response to a value of the gain limiter.
A machine-accessible storage device that stores instructions that, if executed by a machine, will cause the machine to perform operations comprising:
- simulating a reference circuit design at a target crossover frequency, the reference circuit design representing a power supply circuit that includes a feedback stage to regulate an output of a power supply;
- determining an initial phase margin of the reference circuit design;
- adjusting a value of a gain limiter of the reference circuit design to limit a loop gain of the reference circuit design, wherein the gain limiter is a resistor and wherein adjusting the value of the gain limiter includes adjusting a value of the resistor and wherein an initial phase margin curve of the reference circuit design is substantially unaffected in response to adjusting the value of the gain limiter;
- and then
- adding an impedance network to the feedback stage in response to comparing the initial phase margin of the reference circuit design at the target crossover frequency with a threshold phase margin, the impedance network to increase the initial phase margin, wherein the impedance network is coupled in parallel with the gain limiter, and wherein adding the impedance network to the feedback stage further includes calculating a capacitance value of an impedance component of the impedance network in response to a value of the gain limiter.
A system, comprising:
- a processor to execute instructions;
- random access memory (RAM) coupled to the processor to store the instructions;
- and
- a data storage unit (DSU) coupled to the processor and storing a computer-aided-design (CAD) tool that, if executed by the processor, will cause the processor to perform operations comprising:
- loading a reference circuit design from the DSU into the CAD tool, the reference circuit design representing a power supply circuit that includes a feedback stage to regulate an output of a power supply;
- simulating the reference circuit design at a target crossover frequency with the CAD tool;
- determining an initial phase margin of the reference circuit design;
- adjusting a value of a gain limiter of the reference circuit design to limit a loop gain of the reference circuit design, wherein the gain limiter is a resistor and wherein adjusting the value of the gain limiter includes adjusting a value of the resistor and wherein in an initial phase margin curve of the reference circuit design is substantially unaffected in response to adjusting the value of the gain limiter;
- and then
- adding an impedance network to the feedback stage in response to comparing the initial phase margin of the reference circuit design at the target crossover frequency with a threshold phase margin, the impedance network to increase the initial phase margin, wherein the impedance network is coupled in parallel with the gain limiter, and wherein adding the impedance network to the feedback stage further includes calculating a capacitance value of an impedance component of the impedance network in response to a value of the gain limiter.
Dependencies are inferred from the claim text.