Unified memory architecture for recording applications

A method for error correction processing recording data comprising the steps of:

• (A) generating an input signal by reading compressed-and-encoded video from a source in both a first state and a second state;
• (B) extracting video data as a first block arranged as a Reed-Solomon product code from said input signal with a first circuit;
• (C) sending said first block from said first circuit through a second circuit to an external memory;
• (D) calculating a plurality of first row syndromes and a plurality of first column syndromes from said first block;
• and
• (E) storing both said first row syndromes and said first column syndromes in a local memory while excluding said first block from said local memory;
• (F) calculating a plurality of correction values corresponding to said first block in said first circuit while said first block remains unaltered as initially written in said external memory;
• (G) decoding in a sequence alternating between a first pass and a second pass, wherein (i) said first pass comprises decoding said first column syndromes to generate column correction results and (ii) said second pass comprises decoding said first row syndromes to generate row correction results;
• (H) updating said first row syndromes using said video data received directly from said first circuit in response to said column correction results;
• and
• (I) updating said first column syndromes using said video data received directly from said second circuit in response to said row correction results
• (J) retrieving said first block from said external memory through said second circuit to said first circuit;
• (K) correcting said first block with said correction values in said first circuit to generate corrected video data in a first internal signal;
• (L) decompressing said corrected video data in said second circuit to generate original video content in an output signal suitable to drive a monitor while in said first state;
• and
• (M) encoding said corrected video data in said second circuit to generated encoded video data in a second internal signal suitable to write to a drive memory while in said second state, said drive memory being different than said source.