Method and apparatus for testing an IC device based on relative timing of test signals
AssigneeHewlett-Packard Development Company, L.P.
InventorsSergio Casillas, Jr., Bruce LaVigne
Life of this patent
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Abstract
An apparatus for testing an IC device includes a test signal generator for generating a predefined sequence of test signals that are input to the IC device. A timing skew monitor is provided for monitoring the test signals input in the IC device and a signal output from the IC device for a predetermined time period, and creating an array indicating an execution or a nonexecution of signal timing combinations of one of the test signals relative to at least one of the other test signals within the predetermined time period by the IC device. A determination as to whether the desired signal timing combinations of the test signals have been executed by the IC device is made by an operator.
Claims18
A method for testing an IC device,
- comprising:
- generating a plurality of predefined test signals in sequence;
- inputting the test signals into the IC device and a timing skew monitor;
- monitoring the test signals input to the timing skew monitor and an output signal generated by the IC device from the test signals input to the IC device, for a predetermined time period;
- creating an array indicating receipt or nonreceipt of signal timing combinations of one of the test signals and the output signal relative in time prior to and after receipt of at least one of the other test signals and the output signal within said predetermined time period by the timing skew monitor;
- and
- reviewing the array to determine whether desired signal timing combinations of the test signals have been received by the timing skew monitor.
An apparatus for testing an IC device,
- comprising:
- a test signal generator for generating a plurality of predefined test signal sequences input in the IC device;
- and
- a timing skew monitor for receiving the predefined test signal and an output signal generated by the IC device based on the test signal input to the IC device and the output signal, monitoring the test signals for a predetermined time period, and creating an array indicating receipt or non receipt of signal timing combinations of one of the test signals and the output signal relative in time prior to and after a receipt of at least one of the other test signals and the output signal within the predetermined time period by the timing skew monitor;
- wherein an operator reviews the array to determine whether desired signal timing combinations of test signals have been received by the timing skew monitor.
Dependencies are inferred from the claim text.