System for providing a slow command decode over an untrained high-speed interface

A hub device in a memory system, the hub device comprising:

• a connection to an high-speed interface;
• and
• slow command decode circuitry including logic for:
• receiving slow commands over the high-speed interface, the slow commands operating at a first data rate that is slower than a second data rate utilized by the high-speed interface after it has been trained;
• decoding the slow commands, wherein a decode of a portion of a command identifies the command as a slow command and an other portion of the command includes information utilized for training of the untrained high-speed interface, the training including modifying one or more of drive strength, receiver capture timing and bus termination;
• and
• executing the slow commands.

A memory module comprising:

• a plurality of memory devices;
• and
• a memory interface device in communication with the memory devices via a first interface and in communication with a memory controller via a high-speed interface, the memory interface device including slow command circuitry for:
• receiving slow commands over the high-speed interface when the high-speed interface is in an untrained state, the slow commands operating at a first data rate that is slower than a second data rate utilized by the high-speed interface after it has been trained;
• decoding the slow commands, wherein a decode of a portion of a command identifies the command as a slow command and an other portion of the command includes information utilized for training of the untrained high-speed interface, the training including modifying one or more of drive strength, receiver capture timing and bus termination;
• and
• executing the slow commands.