Microcontroller
AssigneeFujitsu Microelectronics Limited
InventorNobuhiko Akasaka
Life of this patent
Estimating the term…
Abstract
A peripheral circuit control register has a plurality of bits corresponding respectively to peripheral resources. A decoder activates an access signal to the peripheral resource at an access destination when the bit corresponding to the peripheral resource at the access destination in the peripheral circuit control register is under a set state in response to occurrence of access to any of the peripheral resources by a CPU. A functional specification of an evaluation chip can be made equivalent to those of product chips and development of a wrong user program can be prevented by setting in advance the bits of the peripheral circuit control register corresponding to the peripheral resources mounted to the product chip to the set state.
Claims12
A microcontroller being configured as a common evaluation chip that comprehensively includes functional specifications of a plurality of product chips, said microcontroller comprising:
- a processing circuit operating in accordance with a program;
- a plurality of peripheral circuits;
- a peripheral circuit control register having a plurality of bits corresponding to said plurality of peripheral circuits, respectively, among the plurality of bits a bit corresponding to a peripheral circuit mounted on the microcontroller and associated with a functional specification of one of the product chips being an object of program development is set under a set state and a bit corresponding to a peripheral circuit not associated with a functional specification of one of the product chips is set under a reset state, via an access by said processing circuit;
- and
- an access control circuit activating an access signal to the peripheral circuit to which the access by said processing circuit occurs when one of the bits in said peripheral circuit control register corresponding to the peripheral circuit is under a set state and not activating the access signal to the peripheral circuit to which the access by said processing circuit occurs when one of the bits in said peripheral circuit control register corresponding to the peripheral circuit is under a reset state, when the access to any of said peripheral circuits by said processing circuit occurs.
Dependencies are inferred from the claim text.