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US 7,623,594 B2Granted
Satellite receiver system
AssigneeDelphi Technologies, Inc.
InventorsJeffrey J. Marrah, Shuping Zhang, Douglas A. Cramer, Harry Diamond
Life of this patent
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Abstract
An SDARS receiver for use with at least two antennae, each of which receives bitstreams from a first satellite, bitstreams from a second satellite, and bitstreams from a terrestrial repeater, including demodulators configured to switch between demodulating bitstreams from the satellites and to switch between demodulating bitstreams from the terrestrial repeater, and a processor coupled to the demodulators, the processor being configured to switch the demodulators according to a variety of algorithms.
Claims29
An SDARS receiver for use with at least two antennae, each of which receives a SAT1 bitstream from a first satellite and a SAT2 bitstream from a second satellite, the receiver including:
- a SAT1 demodulator configured to switch between demodulating the SAT1 bitstream from one of the antennae and demodulating the SAT1 bitstream from the other of the antennae;
- a SAT2 demodulator configured to switch between demodulating the SAT2 bitstream from one of the antennae and demodulating the SAT2 bitstream from the other of the antennae;
- and
- a processor coupled to the demodulators, the processor being configured to switch the demodulators according to an algorithm wherein if a currently demodulated SAT1 bitstream from one of the antennae is QPSK unlocked, then the processor switches the SAT1 demodulator to demodulate the SAT1 bitstream from the other of the antennae, and if a currently demodulated SAT2 bitstream from one of the antennae is QPSK unlocked, then the processor switches the SAT2 demodulator to demodulate the SAT2 bitstream from the other of the antennae;
- wherein the processor determines a C/N ratio for each of the currently demodulated bitstreams when neither of the currently demodulated bitstreams is OPSK unlocked and the processor determines a first average C/N ratio over time for each of the currently demodulated bitstreams, wherein the processor switches each of the demodulators to demodulate a bitstream from a different antenna if both of the first average C/N ratios exceed a predetermined threshold wherein the processor determines a second average C/N ratio over time for each of the bitstreams from the different antenna after switching the demodulators and wherein the processor compares the second average C/N ratio to the first average C/N ratio for the bitstreams corresponding to each of the demodulators, and again switches demodulation to a bitstream from a different antenna for any demodulator having an associated second average C/N ratio that is less than its associated first average C/N ratio.
2 more elements
A method of processing signals in an SDARS receiver for use with at least two antennae, each of which receives a SAT1 bitstream from a first satellite and a SAT2 bitstream from a second satellite, the method including:
- demodulating the SAT1 bitstream from one of the antennae;
- demodulating the SAT2 bitstream from one of the antennae;
- determining a QPSK lock status of each of the bitstreams;
- demodulating the SAT1 bitstream from the other of the antennae if the QPSK lock status of the SAT1 bitstream is unlocked;
- demodulating the SAT2 bitstream from the other of the antennae if the QPSK lock status of the SAT2 bitstream is unlocked;
- determining a first C/N ratio for each of a currently demodulated bitstreams when neither of the currently demodulated bitstreams is OPSK unlocked;
- switching each of the demodulators to demodulate the bitstream from a different antenna if both of the first C/N ratios exceed a predetermined threshold;
- determining a second C/N ratio for each of the bitstreams from the different antenna after switching the demodulators;
- and
- comparing the second C/N ratio to the first C/N ratio for the bitstreams corresponding to each of the demodulators, and again switching demodulation to the bitstream from the different antenna for any demodulator having an associated second C/N ratio that is less than its associated first C/N ratio.
7 more elements
An SDARS receiver for use with at least two antennae, each of which receives a SAT1 bitstream from a first satellite and a SAT2 bitstream from a second satellite, the receiver including:
- a SAT1 demodulator configured to switch between demodulating the SAT1 bitstream from one of the antennae and demodulating the SAT1 bitstream from the other of the antennae;
- a SAT2 demodulator configured to switch between demodulating the SAT2 bitstream from one of the antennae and demodulating the SAT2 bitstream from the other of the antennae;
- and
- a processor coupled to the demodulators, the processor being configured to switch the demodulators according to an algorithm wherein if a currently demodulated SAT1 bitstream from one of the antennae is QPSK unlocked, then the processor switches the SAT1 demodulator to demodulate the SAT1 bitstream from the other of the antennae, and if a currently demodulated SAT2 bitstream from one of the antennae is QPSK unlocked, then the processor switches the SAT2 demodulator to demodulate the SAT2 bitstream from the other of the antennae, wherein the processor is configured to detect a sudden reduction of signal strength of the currently demodulated bitstream, switch the demodulators, wait a predetermined period of time, and determine a QPSK lock status for each of the currently demodulated bitstreams within a fraction of a QPSK lock status check time period.
1 more element
An SDARS receiver for use with at least two antennae, each of which receives a SAT1 bitstream from a first satellite and a SAT2 bitstream from a second satellite, the receiver including:
- a SAT1 demodulator configured to switch between demodulating the SAT1 bitstream from one of the antennae and demodulating the SAT1 bitstream from the other of the antenna:
- a SAT2 demodulator configured to switch between demodulating the SAT2 bitstream from one of the antennae and demodulating the SAT2 bitstream from the other of the antennae;
- and
- a processor coupled to the demodulators, the processor being configured to switch the demodulators according to an algorithm wherein if a currently demodulated SAT1 bitstream from one of the antennae is QPSK unlocked, then the processor switches the SAT1 demodulator to demodulate the SAT1 bitstream from the other of the antennae, and if a currently demodulated SAT2 bitstream from one of the antennae is QPSK unlocked, then the processor switches the SAT2 demodulator to demodulate the SAT2 bitstream from the other of the antennae, wherein the processor is configured to periodically sample an AGC value for each of the currently demodulated bitstreams and the processor is configured to maintain a running average of AGC values and to respond to detection of a sudden reduction of signal strength of the currently demodulated bitstream by switching both demodulators to demodulate the bitstream having a greatest average AGC value.
1 more element
An SDARS receiver for use with at least two antennae, each of which receives a SAT1 bitstream from a first satellite and a SAT2 bitstream from a second satellite, the receiver including:
- a SAT1 demodulator configured to switch between demodulating the SAT1 bitstream from one of the antennae and demodulating the SAT1 bitstream from the other of the antennae;
- a SAT2 demodulator configured to switch between demodulating the SAT2 bitstream from one of the antennae and demodulating the SAT2 bitstream from the other of the antennae;
- and
- a processor coupled to the demodulators, the processor being configured to switch the demodulators according to an algorithm wherein if a currently demodulated SAT1 bitstream from one of the antennae is QPSK unlocked, then the processor switches the SAT1 demodulator to demodulate the SAT1 bitstream from the other of the antennae, and if a currently demodulated SAT2 bitstream from one of the antennae is QPSK unlocked, then the processor switches the SAT2 demodulator to demodulate the SAT2 bitstream from the other of the antennae, wherein the processor determines a TDM locked status of each of the currently demodulated bitstreams when one or both of the currently demodulated bitstreams is QPSK unlocked and the processor switches the demodulator corresponding to the QPSK unlocked bitstream if the TDM lock status of one of the currently demodulated bitstreams is TDM unlocked.
1 more element
A method of processing signals in an SDARS receiver for use with at least two antennae, each of which receives a SAT1 bitstream from a first satellite and a SAT2 bitstream from a second satellite, the method including:
- demodulating the SAT1 bitstream from one of the antennae;
- demodulating the SAT2 bitstream from one of the antennae;
- determining a QPSK lock status of each of the bitstreams;
- demodulating the SAT1 bitstream from the other of the antennae if the QPSK lock status of the SAT1 bitstream is unlocked;
- demodulating the SAT2 bitstream from the other of the antennae if the QPSK lock status of the SAT2 bitstream is unlocked;
- determining a TDM locked status of each of the currently demodulated bitstreams when one or both of the currently demodulated bitstreams is QPSK unlocked;
- and
- switching the demodulator corresponding to the QPSK unlocked bitstream if the TDM lock status of one of the currently demodulated bitstreams is TDM unlocked.
5 more elements
Dependencies are inferred from the claim text.