Apparatus and method for processing cells in an ATM adaptation layer device in a communications system that exhibits cell delay variation

A method of processing cells in a communications system, said method comprising the steps of:

• obtaining a plurality of cells;
• causing a plurality of payloads from said plurality of cells to be stored in annotated form in a cell delay variation buffer, wherein a compressed representation of lost cells for storage is based on a number of lost cells field;
• causing a given one of said annotated payloads to be extracted from said cell delay variation buffer;
• causing payload information of said given one of said annotated payloads to be stored in a reassembly memory buffer;
• causing said payload information to be extracted from said reassembly memory buffer;
• and
• receiving a request for data from a clocked, constant bit rate telephone system, wherein said payload information is extracted from said reassembly memory buffer responsive to a request from said telephone system.

An integrated circuit for interfacing with a cell delay variation buffer and a reassembly memory buffer, said integrated circuit comprising a segmentation and reassembly apparatus, said segmentation and reassembly apparatus in turn comprising:

• a header and sequence number processing module configurable to obtain a plurality of cells;
• a cell delay variation buffer interface coupled to said header and sequence number processing module and configurable to interface with the cell delay variation buffer;
• a reassembly processing module coupled to said header and sequence number processing module;
• and
• a reassembly memory buffer interface coupled to said reassembly processing module and configurable to interface with the reassembly memory buffer;
• wherein:
• said header and sequence number processing module is configurable to:
• cause a plurality of payloads from the plurality of cells to be stored in annotated form through said cell delay variation buffer interface, wherein a compressed representation of lost cells for storage is based on a number of lost cells field;
• cause a given one of the annotated payloads to be extracted through said cell delay variation buffer interface;
• and
• pass payload information of the given one of the annotated payloads to said reassembly processing module;
• and
• said reassembly processing module is configurable to:
• cause the payload information to be stored through said reassembly memory buffer interface;
• and
• cause the payload information to be extracted through said reassembly memory buffer interface:
• said integrated circuit is for interfacing with a line side comprising a clocked, constant bit rate telephone system and a network side comprising a connectionless data-based network;
• said header and sequence number processing module is configured to interface with the network side;
• and
• said reassembly and processing module is configured to interface with the line side and causes the payload information to be extracted through said reassembly memory buffer interface in response to a request from the line side.