Programmable packet parsing processor
AssigneeCisco Technology, Inc.
InventorsRina Panigrahy, Jackie Liu, Daniel Yu-Kwong Ng, Sanjay Jain, Nagaraj A. Bagepalli, Abhijit Patra
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AssigneeCisco Technology, Inc.
InventorsRina Panigrahy, Jackie Liu, Daniel Yu-Kwong Ng, Sanjay Jain, Nagaraj A. Bagepalli, Abhijit Patra
Estimating the term…
The present invention provides a packet processing device and method. A parsing processor provides instruction-driven content inspection of network packets at 10-Gbps and above with a parsing engine that executes parsing instructions. A flow state unit maintains statefulness of packet flows to allow content inspection across several related network packets. A state-graph unit traces state-graph nodes to keyword indications and/or parsing instructions. The parsing instructions can be derived from a high-level application to emulate user-friendly parsing logic. The parsing processor sends parsed packets to a network processor unit for further processing.
A packet parsing processor, comprising:
In a packet parsing processor, a method comprising:
A packet parsing processor, comprising
A computer program product, comprising a computer-readable medium having computer program instructions and data embodied thereon for a method of parsing packets in a packet parsing processor, the method comprising:
A network device having a processor and a memory, comprising:
Dependencies are inferred from the claim text.