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US 7,623,406 B2Granted
Accessing semiconductor memory device according to an address and additional access information
AssigneeSamsung Electronics Co., Ltd.
InventorsGi-Ho Park, Gun-Ok Jung
Life of this patent
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Abstract
A semiconductor memory device includes a memory cell array, a decoder, and an access control unit. The decoder generates a word line voltage according to an address for a plurality of memory cells in the memory cell array. The access control unit controls access to the plurality of memory cells according to the word line voltage and additional access information separate from the address.
Claims14
A semiconductor memory device comprising:
- a memory cell array;
- a decoder for generating a word line voltage according to an address for a plurality of memory cells in the memory cell array;
- an access control unit that controls access to the plurality of memory cells according to the word line voltage and additional access information separate from said address, wherein the access control unit includes:
- an access information storage unit for storing said additional access information;
- and
- a logic unit performing logical operation on the word line voltage and the access information to generate a control signal;
- and
- a sense amplifier, wherein the control signal is used as a sense amplifier enable signal that controls coupling of bit-lines of the plurality of memory cells to the sense amplifier.
5 more elements
A method of accessing a semiconductor memory device, comprising:
- generating a word line voltage for a plurality of memory cells in a memory cell array of the semiconductor memory device according to an address;
- controlling access to the plurality of memory cells according to the word line voltage and additional access information separate from said address;
- storing said additional access information in said semiconductor memory device;
- performing logical operation on the word line voltage and the access information to generate a control signal;
- and
- using the control signal as a sense amplifier enable signal that controls coupling of bit-lines of the plurality of memory cells to a sense amplifier of the semiconductor memory device.
3 more elements
A semiconductor memory device comprising:
- a memory cell array;
- a decoder for generating a word line voltage according to an address for a plurality of memory cells in the memory cell array;
- an access control unit that controls access to the plurality of memory cells according to the word line voltage and additional access information separate from said address,
- wherein the semiconductor memory device is a branch target buffer, and wherein the additional access information is generated by a branch target predictor;
- wherein the access control unit includes:
- an access information storage unit for storing said additional access information;
- and
- a logic unit performing logical operation on the word line voltage and the access information to generate a control signal;
- and
- a sense amplifier, wherein the control signal is used as a sense amplifier enable signal that controls coupling of bit-lines of the plurality of memory cells to the sense amplifier.
7 more elements
A method of accessing a semiconductor memory device, comprising:
- generating a word line voltage for a plurality of memory cells in a memory cell array of the semiconductor memory device according to an address;
- controlling access to the plurality of memory cells according to the word line voltage and additional access information separate from said address;
- wherein the semiconductor memory device is a branch target buffer, and wherein the additional access information is generated by a branch target predictor;
- storing said additional access information in said semiconductor memory device;
- performing logical operation on the word line voltage and the access information to generate a control signal;
- and
- using the control signal as a sense amplifier enable signal that controls coupling of bit-lines of the plurality of memory cells to a sense amplifier of the semiconductor memory device.
4 more elements
Dependencies are inferred from the claim text.