NAND flash memory device and method of operating the same
AssigneeHynix Semiconductor Inc.
InventorsJae-Won Cha, Sam-Kyu Won, Kwang-Ho Baek
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Abstract
A NAND flash memory device having memory cells for storing data includes a fuse circuit configured to store option information for operation of the NAND flash memory device as logic codes. A register circuit includes registers for temporarily storing the logic codes stored in the fuse circuit. A test circuit is configured to change the logic code stored in the register circuit and store the changed logic code irrespective of the logic code of the fuse circuit for test operation of the NAND flash memory device. A processor is configured to control operation of the NAND flash memory device.
Claims22
A NAND flash memory device having memory cells for storing data, the NAND flash memory device comprising:
- a fuse circuit configured to store option information for operation of the NAND flash memory device, wherein the option information comprises logic codes;
- a register circuit comprising registers for temporarily storing the logic codes stored in the fuse circuit;
- a test circuit configured to change the logic codes stored in the register circuit and store the changed logic codes irrespective of the corresponding logic code of the fuse circuit for test operation of the NAND flash memory device;
- and
- a processor configured to control operation of the NAND flash memory device.
A method of operating a NAND flash memory device having a fuse circuit for storing an initial setting value as logic codes and registers for temporarily storing the logic codes outputted from the fuse circuit, the method comprising:
- applying a power source;
- generating logic codes to be stored in the fuse circuit in accordance with the applied power source;
- storing the generated logic codes in the registers in accordance with whether or not a present operation mode is a test mode;
- and
- performing an initial setting by transmitting the logic codes stored in the registers to a surrounding circuit for operation of the NAND flash memory device.
Dependencies are inferred from the claim text.