System for low voltage programming of non-volatile memory cells
AssigneeSanDisk Corporation
InventorsDana Lee, Jeffrey Lutze
Life of this patent
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Abstract
System for programming a selected non-volatile memory cell in a memory array having a gate node coupled to a wordline WL(n) and a drain node connected to a selected bitline by injecting hot carriers from a drain region of an injecting memory cell having a gate node coupled to a next neighbor wordline WL(n−1) into a floating gate of the selected non-volatile memory cell on the wordline WL(n).
Claims17
A system for providing low voltage programming of a selected non-volatile memory cell in a memory array having a gate node coupled to a wordline WL(n) and a drain node connected to a selected bitline, comprising:
- a programming module;
- an interface arranged to electrically couple the memory array to the programming module;
- and
- a processor included in the programming module and electrically coupled to the interface to execute programming instructions:
- (a) causing hot carriers to be injected from a drain region of an injecting memory cell having a gate node coupled to a next neighbor wordline WL(n−1) into a floating gate of the selected non-volatile memory cell on the wordline WL(n).
A system for providing low voltage programming of a selected non-volatile memory cell in a memory array having a gate node coupled to a wordline WL(n) and a drain node connected to a selected bitline, comprising:
- a programming module;
- an interface arranged to electrically couple the memory array to the programming module;
- and
- a processor included in the programming module and electrically coupled to the interface to execute programming instructions only if a threshold voltage of the selected non-volatile memory cell is less than a target threshold voltage where the programming instructions include holding the selected bitline at ground, applying Vdd to all unselected bitlines;
- applying low passing voltage VpassL to a drain select gate (SGD) line, applying Vpp to common source line, applying a high passing voltage VpassH to all unselected wordlines except for the next neighbor word line WL(n−1), applying the high passing voltage VpassH to a source gate select (SGS) line, applying Vpgm to the selected word line WL(n), and sweeping a next neighbor word line WL(n−1) gate node voltage from about 0 V to about a Vread thereby causing hot carriers to be injected from a drain region of an injecting memory cell having a gate node coupled to a next neighbor wordline WL(n−1) into a floating gate of the selected non-volatile memory cell on the wordline WL(n), otherwise, if the threshold voltage is greater than a target threshold voltage, the non-volatile memory cell is locked out.
A system for providing low voltage programming of a selected non-volatile memory cell in a memory array having a gate node coupled to a wordline WL(n) and a drain node connected to a selected bitline, comprising:
- a programming module;
- an interface arranged to electrically couple the memory array to the programming module;
- and
- a processor included in the programming module and electrically coupled to the interface to execute programming instructions only if a threshold voltage of the selected non-volatile memory cell is less than a target threshold voltage, where the programming instructions include holding the selected bitline at Vpp, grounding to all unselected bitlines, applying high passing voltage VpassH to a drain select gate (SGD) line and unselected wordlines except for the next neighbor wordline WL(n−1), applying low passing voltage VpassL to SGS line;
- grounding common source line, applying Vpgm to the selected word line WL(n), and sweeping a next neighbor word line WL(n−1) gate node voltage from about 0 V to about a Vread when the threshold voltage is less than the target voltage thereby causing hot carriers to be injected from a drain region of an injecting memory cell having a gate node coupled to a next neighbor wordline WL(n−1) into a floating gate of the selected non-volatile memory cell on the wordline WL(n), otherwise, if the threshold voltage is greater than an target threshold voltage, the non-volatile memory cell is locked out.
Dependencies are inferred from the claim text.