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US 7,623,376 B2Granted
Flash memory device with multi level cell and burst access method therein
AssigneeSamsung Electronics Co., Ltd.
InventorsJung-Woo Lee, Jae-Yong Jeong
Life of this patent
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Abstract
A flash memory device including memory cells, each memory cell configured to store bits, a sensing circuit configured to sequentially sense, for each memory cell, sets of the bits of the memory cell, a data rearrangement unit configured to receive words of data and to rearrange bits of the words to be stored in the memory cells, and an output circuit configured to output a group of the words using the sets of bits from one sensing, at least as early as during a subsequent sensing of sets of bits.
Claims4
A method of programming a semiconductor memory device comprising:
- receiving a plurality of words of data;
- mapping a first set of the words of data to a plurality of first sets of bits of a plurality of multi level memory cells, each multi level memory cell having a plurality of sets of bits, each set to be sensed sequentially, the first sets of bits to be sensed in a first sensing of the multi level memory cells;
- mapping a subsequent set of the words of data to a plurality of subsequent sets of the bits of the multi level memory cells, the subsequent sets of the bits to be sensed in a subsequent sensing of the multi level memory cells;
- and
- storing the mapped sets of words in the multi level memory cells.
2 more elements
Dependencies are inferred from the claim text.