Nonvolatile semiconductor memory for storing multivalued data

A nonvolatile semiconductor memory, comprising:

• a memory cell array comprised of a multivalued memory cell for assigning data on a first page and a second page to different threshold voltages set in a “state 0”, a “state 1”, a “state 2” and a “state 3” and storing the data;
• a data processing circuit for carrying out a programming operation for writing data on a first or second logic level supplied from an outside to the memory cell array on a page unit and a read operation for reading the data from the memory cell array;
• and
• a control circuit for controlling the operations of the data processing circuit depending on a plurality of orders of pages in which the programming operation is to be carried out,
• wherein in the case in which the programming operation is to be carried out in order from the first page to the second page;
• the control circuit holds the “state 0” when a first logic level is to be programmed and carries out a change from the “state 0” to the “state 1” when a second logic level is to be programmed in the programming operation for the first page;
• and
• in the programming operation for the second page, the control circuit holds the “state 0” when the first logic level is to be programmed and carries out a change from the “state 0” to the “state 3” when the second logic level is to be programmed in the case in which the first logic level is stored in the first page, and holds the “state 1” when the first logic level is to be programmed and carries out a change from the “state 1” to the “state 2” when the second logic level is to be programmed in the case in which the second logic level is stored in the first page, and
• in the case in which the programming operation is to be carried out in order from the second page to the first page,
• the control circuit holds the “state 0” when the first logic level is to be programmed and carries out a change from the “state 0” to the “state 2” when the second logic level is to be programmed in the programming operation for the second page, and
• in the programming operation for the first page, the control circuit holds the “state 0” when the first logic level is to be programmed and carries out a change from the “state 0” to the “state 1” when the second logic level is to be programmed in the case in which the first logic level is stored in the second page, and carries out a change from the “state 2” to the “state 3” when the first logic level is to be programmed and holds the “state 2” when the second logic level is to be programmed in the case in which the second logic level is stored in the second page.