Resistance change memory device
AssigneeKabushiki Kaisha Toshiba
InventorsHaruki Toda, Koichi Kubo
Life of this patent
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Abstract
A resistance change memory device including a substrate, first and second wiring lines formed above the substrate to be insulated from each other, and memory cells disposed between the first and second wiring lines wherein the memory cell includes, a variable resistance element for storing as information a resistance value and a Schottky diode connected in series to the variable resistance element. The variable resistance element has a recording layer composed of a composite compound containing at least two types of cation elements, at least one type of the cation element being a transition element having “d”-orbit, in which electrons are incompletely filled, the shortest distance between adjacent cation elements being 0.32 nm or less.
Claims31
A resistance change memory device comprising:
- a substrate;
- first wiring lines formed above the substrate;
- second wiring lines formed above the substrate to cross the first wiring lines as being electrically insulated therefrom;
- and memory cells disposed at respective crossing points of the first wiring lines and the second wiring lines, one ends thereof being connected to the first wiring lines while the other ends are connected to the second wiring lines, wherein the memory cell comprises:
- a variable resistance element for storing as information a resistance value;
- and
- a Schottky diode connected in series to the variable resistance element, and wherein
- the variable resistance element comprises a recording layer composed of a composite compound containing at least two types of cation elements, at least one type of the cation element being a transition element having “d”-orbit, in which electrons are incompletely filled, the shortest distance between adjacent cation elements being 0.32 nm or less.
A resistance change memory device comprising:
- a semiconductor substrate;
- semiconductor layers formed in the semiconductor substrate so that these are arrayed in a matrix form while being partitioned by an element isolation dielectric film;
- diodes each formed at its corresponding semiconductor layer with a metal electrode as a terminal electrode, the metal electrode being formed at part of a surface of each the semiconductor layer;
- first wiring lines provided to commonly connect the diodes as arrayed in one direction of the matrix;
- an interlayer dielectric film covering the first wiring lines;
- metal plugs buried in space portions of the first wiring lines of the interlayer dielectric film and being in ohmic contact with each the semiconductor layer;
- variable resistance elements with a recoding layer formed above the interlayer dielectric film to have a bottom surface in contact with the metal plugs;
- and second wiring lines provided to cross the first wiring lines while being in contact with an upper surface of the recording layer, wherein
- the recoding layer is composed of a composite compound containing at least two types of cation elements, at least one type of the cation element being a transition element having “d”-orbit, in which electrons are incompletely filled, the shortest distance between adjacent cation elements being 0.32 nm or less.
A resistance change memory device comprising:
- an insulative substrate;
- first wiring lines formed above the insulative substrate;
- memory cells being formed over each the first wiring line so that one end is connected to each the first wiring line, each the memory cell having a stacked structure of a variable resistance element and a diode, the variable resistance element storing as information a resistance value;
- and second wiring lines formed over the memory cells to commonly connect together the other end portions of the memory cells arrayed in a direction crossing the first wiring lines, wherein
- the variable resistance element comprises a recording layer composed of a composite compound containing at least two types of cation elements, at least one type of the cation element being a transition element having “d”-orbit, in which electrons are incompletely filled, the shortest distance between adjacent cation elements being 0.32 nm or less.
A resistance change memory device comprising an insulative substrate and memory cell arrays stacked over the insulative substrate, wherein each the memory cell array comprises:
- first wiring lines extending in parallel with each other;
- memory cells formed above first wiring lines in such a manner that one ends are connected to the first wiring lines, the memory cell comprising a stacked structure of a variable resistance element and a diode, the variable resistance element storing as information a resistance value;
- and
- second wiring lines formed above the memory cells to commonly connect the other ends of the memory cells arrayed in a direction crossing the first wiring lines, and wherein
- the variable resistance element has a recording layer composed of a composite compound containing at least two types of cation elements, at least one type of the cation element being a transition element having “d”-orbit, in which electrons are incompletely filled, the shortest distance between adjacent cation elements being 0.32 nm or less.
Dependencies are inferred from the claim text.