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US 7,623,171 B2Granted
Multiple crawbar switching in charge domain linear operations
AssigneeAptina Imaging Corporation
InventorGiuseppe Rossi
Life of this patent
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Abstract
An analog differential voltage circuit is disclosed that enables the combination of a plurality of voltage signals in the analog domain of a CMOS processing system prior to being received by a differential amplifier and prior to being digitized. By programming the column decoder to read out a plurality of column buffer circuits, a plurality of linear operations (e.g., addition, substation, averaging, weighted, sum) may be performed on the plurality of analog voltage levels prior to their being digitized.
Claims72
An imaging system, comprising:
- a first storage device for storing a first plurality of analog voltage levels received from a first voltage source;
- a second storage device for storing a second plurality of analog voltage levels received from a pixel cell, at least one of said first and second storage devices comprising a reverse polarity circuit for switching a storage location of respective first and second analog voltage levels stored on said storage device;
- and
- a comparator coupled to said first and second storage devices, said first and second storage devices being coupled together such that said first plurality of analog voltage levels and said second plurality of analog voltage levels are processed prior to being forwarded to said comparator, said comparator configured to compare said processed first and second plurality of analog voltage levels.
1 more element
A column buffer device for use with an imaging system, said column buffer device comprising:
- a polarity reversing circuit adapted to receive first and second analog voltages from a pixel cell;
- a first storage device coupled to said polarity reversing circuit for storing one of said first and second analog voltage levels, and
- a second storage device coupled to said polarity reversing circuit for storing the other of said first and second analog voltage levels, wherein when said polarity reversing circuit is in a first state said first and second voltage levels are routed to said first and second storage devices in a first manner and wherein when said polarity reversing circuit is in a second state said first and second voltage levels are routed to said first and second storage devices in a second manner.
An imager array for performing linear operations in the analog domain, the array comprising:
- first and second column buffer circuits switchably coupled to a gain stage circuit, at least one of said first and second column buffer circuits comprising a reverse polarity circuit for switching a storage location of respective first and second analog voltage levels stored on said at least one column buffer circuit;
- and
- a column decoder circuit coupled to said first and second column buffer circuits, said column decoder circuit configured to couple said first column buffer circuit with said gain stage circuit at substantially the same time said second column buffer circuit is coupled with said gain stage circuit.
A method of operating an active pixel sensor integrated circuit, the method comprising:
- storing a first plurality of analog voltage levels received from a first voltage source in a first storage device;
- storing a second plurality of analog voltage levels received from a pixel cell in a second storage device, wherein at least one of said first and second storage devices comprises a reverse polarity circuit configured to switch a storage location of respective said first and second analog voltage levels stored on said first and second storage devices respectively;
- combining said first and second plurality of analog voltage level into first and second combined voltage levels;
- and
- forwarding said first and second combined voltage levels to a comparator to compare said first and second combined voltage levels.
2 more elements
A processor system, comprising:
- a processor;
- and
- an imager device coupled to said processor, said imager device comprising:
- a first storage device for storing a first plurality of analog voltage levels received from a first voltage source;
- a second storage device for storing a second plurality of analog voltage levels received from a pixel cell, at least one of said first and second storage devices comprising a reverse polarity circuit for switching a storage location of respective first and second analog voltage levels stored on said storage device;
- and
- a comparator coupled to said first and second storage devices, said first and second storage devices being coupled together such that said first plurality of analog voltage levels and said second plurality of analog voltage levels are processed prior to being forwarded to said comparator, said comparator configured to compare said processed first and second plurality of analog voltage levels.
4 more elements
Dependencies are inferred from the claim text.