Wireless and passive tablet for inputting to computer

A wireless and passive tableting apparatus for computer inputting comprising a tablet and a pen, characterized in that

• nothing wires the pen and the tablet and no battery is in the pen;
• the tablet which can sense pressure from the pen comprises
• a transmitting circuit comprising a plurality of coils in a first direction,
• a receiving circuit comprising a plurality of coils in a second direction which is perpendicular to the first direction,
• an amplifying circuit,
• a phase angle and amplitude detecting circuit and
• an integrating circuit;
• and
• the pen comprises a parallel resonant circuit composed of capacitors and inductors;
• the connection relations between them are as follows:
• an auxiliary CPU, which generates a square wave continuously, connects with the transmitting circuit, which can transmit electromagnetic waves corresponding to the square wave continuously;
• the pen circuit receives the electromagnetic wave transmitted from the transmitting circuit to produce and transmit a resonant signal;
• the frequency of the resonant signal is different from the frequency of the transmitted electromagnetic waves;
• the resonant signal is received by the receiving circuit continuously, and amplified by an amplifying circuit that connects with the receiving circuit;
• the transmission of the electromagnetic waves and the receiving of the resonant signal occur simultaneously;
• the amplified signals are inputted into the phase angle and amplitude detecting circuit, and
• the signals output from the phase angle and amplitude detecting circuit are inputted into a primary CPU via the integrating circuit;
• the connection relations of the amplifying circuit in the tablet are as follows:
• a (RX+) terminal for receiving signals connects with ends of first and second parallel resistors (R1 and R2), the other end of the second resistor (R2) connects with a negative input pin (2) of a first amplifier (IC12A) and one end of a third resistor (R3) in parallel, and the other end of the third resistor (R3) connects with an output pin (1) of the first amplifier (IC12A), a first pin (12) of an amplifying circuit chip (IC14) and one end of a fourth resistor (R6);
• a grounding pin (4) of the first amplifier (IC12A) is connected to analogue ground;
• the other end of the first resistor (R1) connects with one end of a fifth resistor (R4), a first capacitor (C6) and a reference voltage terminal;
• the other end of the fifth resistor (R4) connects with a positive input pin (3) of the first amplifier (IC12A), the other end of the first capacitor (C6) is connected to analogue ground and one end of a second capacitor (C7), the other end of the second capacitor (C7) connects with a power supply connection pin (8) of the first amplifier (IC12A) and a first power supply (VDD);
• the other end of the fourth resistor (R6) connects with a second pin (13) of said chip (IC14) and one end of a sixth resistor (R7);
• the other end of the sixth resistor (R7) connects with a third pin 14 of said chip (IC14) and one end of a seventh resistor (R8);
• the other end of the seventh resistor (R8) connects with a fourth pin (15) of said chip (IC14) and one end of an eighth resistor (R9);
• the other end of the eighth resistor (R9) connects with a fifth pin (1) of said chip (IC14) and one end of a ninth resistor (R10);
• the other end of the ninth resistor (R10) connects with a sixth pin (2) of said chip (IC14) and one end of a tenth resistor (R11);
• the other end of the tenth resistor (R11) connects with a seventh pin (4) of said chip (IC14) and one end of an eleventh resistor (R12);
• the other end of the eleventh resistor (R12) connects with an eighth pin (5) of said chip (IC14) and one end of a twelfth resistor (R13);
• the other end of the twelfth resistor (R13) connects with a reference voltage terminal;
• a ninth pin (3) of said chip (IC14) connects with one end of a third capacitor (C1), the other end of the third capacitor (C1) connects with one end of a thirteenth resistor (R16) and a positive input pin (5) of a second amplifier (IC12B);
• the other end of the thirteenth resistor (R16) connects with the reference voltage terminal;
• an output pin (7) of the second amplifier IC12B, which outputs the output signals, connects with one end of a fourteenth resistor (R26);
• the other end of the fourteenth resistor (R26) connects with a negative input pin (6) of the second amplifier (IC12B) and one end of a fifteenth resistor (R23);
• the other end of the fifteenth resistor (R23) connects with the reference voltage terminal;
• a tenth pin (11) of said chip (IC14) connects with a first signal connection (GA), and an eleventh pin (10) of said chip (IC14) connects with a second signal connection (GB) and a twelfth pin (9) of said chip (IC14) connects with a third signal connection (GC), and a thirteenth pin (16) of said chip (IC14) connects with the first power supply (VDD) and one end of a fourth capacitor (C14);
• the other end of the fourth capacitor (C14) connects with the analogue ground, and a fourteenth pin (6), a fifteenth pin (7) and a sixteenth pin (8) of said chip (IC14) connect with analogue ground.